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    Yield-driven design-time task scheduling techniques for multi-processor system on chips under process variation: A comparative study

    , Article IET Computers and Digital Techniques ; Volume 9, Issue 4 , 2015 , Pages 221-229 ; 17518601 (ISSN) Momtazpour, M ; Assare, O ; Rahmati, N ; Boroumand, A ; Barati, S ; Goudarzi, M ; Sharif University of Technology
    Institution of Engineering and Technology  2015
    Abstract
    Process variation has already emerged as a major concern in design of multi-processor system on chips (MPSoC). In recent years, there have been several attempts to bring variability awareness into the task scheduling process of embedded MPSoCs to improve performance yield. This study attempts to provide a comparative study of the current variation-aware design-time task and communication scheduling techniques that target embedded MPSoCs. To this end, the authors first use a sign-off variability modelling framework to accurately estimate the frequency distribution of MPSoC components. The task scheduling methods are then compared in terms of both the quality of the final solution and the...