Sharif Digital Repository

Estimating the energy consumption of applications is a key aspect in optimizing embedded systems energy consumption. This paper proposes a simple yet accurate instruction-level energy estimation model for embedded systems. As a case study, the model parameters were determined for a commonly used ARM7TDMI-based microcontroller. The total energy includes the energy consumption of the processor core, Flash memory, memory controller, and SRAM. The model parameters are instructions opcode, number of shift operations, register bank bit flips, instructions weight and their Hamming distance, and different types of memory accesses. Also, the effect of pipeline stalls have been considered. In order to... 

Most modern multi-core edge devices work in outdoor situations with limited power supplies like energy harvester and batteries. Therefore, energy consumption is a fundamental issue in which the memory subsystem has a significant role. Scratchpad memories (SPM) can provide a broad potential for energy saving. Still, due to the insufficient SPM capacity in such edge devices, a rigorous SPM data allocation scheme is necessary to reduce the energy consumption of the memory subsystem. Emerging non-volatile memories (NVMs) are very useful to reduce the energy consumption of the memory subsystem. Compared with SRAM, NVMs have lower leakage power and higher density, but the read and write latencies... 

Most modern multi-core edge devices work in outdoor situations with limited power supplies like energy harvester and batteries. Therefore, energy consumption is a fundamental issue in which the memory subsystem has a significant role. Scratchpad memories (SPM) can provide a broad potential for energy saving. Still, due to the insufficient SPM capacity in such edge devices, a rigorous SPM data allocation scheme is necessary to reduce the energy consumption of the memory subsystem. Emerging non-volatile memories (NVMs) are very useful to reduce the energy consumption of the memory subsystem. Therefore, embedded and edge devices can take advantage of hybrid SPM composed of both NVM and SRAM to... 

Recently, energy harvesting systems that utilize hybrid NVM-SRAM memory in their designs are introduced as a promising alternative for battery-operated systems. Since the ambient input power of an energy harvesting system fluctuates as the environmental conditions change, the system may stop the execution of programs until it receives enough energy to continue the execution. Resuming the execution of a program after the suspension may lead to data inconsistency in an energy harvesting system and threatens the correct functionality of the programs. In this article, we propose COACH, an energy-efficient consistency-aware memory scheme which guarantees the correct functionality and consistency... 

Embedded systems have time and energy constraints; so, they use scratchpad memory (SPM) as on-chip memory to replace cache. SRAMs low access latency makes it an excellent choice for on-chip memory, but SRAM has a low density and high static power consumption. Non-volatile memories (NVMs) spend high energy and time regarding the write operation while they have the benefits of high density and low static power. Therefore, a compound on-chip memory, which exploits the advantages of SRAM and NVM, could elevate the energy and time efficiency. In this research, we suggested RIDE a compound SPM and data allocation strategy consisting of SRAM and racetrack memory (RTM) to improve both energy usage... 

Recently, energy harvesting systems that utilize hybrid NVM-SRAM memory in their designs are introduced as a promising alternative for battery-operated systems. Since the ambient input power of an energy harvesting system fluctuates as the environmental conditions change, the system may stop the execution of programs until it receives enough energy to continue the execution. Resuming the execution of a program after the suspension may lead to data inconsistency in an energy harvesting system and threatens the correct functionality of the programs. In this paper, we propose COACH, an energy-efficient consistency-aware memory scheme which guarantees the correct functionality and consistency of... 

Recently, energy harvesting systems that utilize hybrid NVM-SRAM memory in their designs are introduced as a promising alternative for battery-operated systems. Since the ambient input power of an energy harvesting system fluctuates as the environmental conditions change, the system may stop the execution of programs until it receives enough energy to continue the execution. Resuming the execution of a program after the suspension may lead to data inconsistency in an energy harvesting system and threatens the correct functionality of the programs. In this paper, we propose COACH, an energy-efficient consistency-aware memory scheme which guarantees the correct functionality and consistency of... 

Energy consumption and predictability are two important constraints in designing real-time embedded systems and one of the recently proposed solutions for the energy consumption problem is the use of non-volatile memories due to their lower leakage power consumption. Furthermore, because of their non-volatile nature, the use of these memories helps normally-off computing and energy harvesting systems. However, the write access latency of non-volatile memories is considerably more than that of SRAM which can decrease the performance and predictability of the system. We present a predictable non-volatile data memory for real-time embedded systems which improves both worst-case execution time... 

Energy consumption and predictability are two important constraints in designing real-time embedded systems and one of the recently proposed solutions for the energy consumption problem is the use of non-volatile memories instead of conventional SRAM due to their lower leakage power consumption and smaller cell area. Furthermore, because of their non-volatile nature, the use of these memories helps normally-off computing and energy harvesting systems to resume their execution without a large startup delay. However, the write access latency of non-volatile memories is considerably more than that of SRAM which can decrease the performance and predictability of the system if not managed... 

Since plasma is rich in many biomarkers used in clinical diagnostic experiments, microscale blood plasma separation is a primitive step in most of microfluidic analytical chips. In this paper, a passive microfluidic device for on-chip blood plasma separation based on Zweifach–Fung effect and plasma skimming was designed and fabricated by hot embossing of microchannels on a PMMA substrate and thermal bonding process. Human blood was diluted in various times and injected into the device. The main novelty of the proposed microfluidic device is the design of diffuser-shaped daughter channels. Our results demonstrated that this design exerted a considerable positive influence on the separation... 

Since plasma is rich in many biomarkers used in clinical diagnostic experiments, microscale blood plasma separation is a primitive step in most of microfluidic analytical chips. In this paper, a passive microfluidic device for on-chip blood plasma separation based on Zweifach–Fung effect and plasma skimming was designed and fabricated by hot embossing of microchannels on a PMMA substrate and thermal bonding process. Human blood was diluted in various times and injected into the device. The main novelty of the proposed microfluidic device is the design of diffuser-shaped daughter channels. Our results demonstrated that this design exerted a considerable positive influence on the separation... 

Worst case execution time and energy consumption are two of the most important design constraints of real-time embedded systems. Many recent studies have tried to improve the memory subsystem of embedded systems by using emerging non-volatile memories. However, accessing these memories imposes performance and energy overhead and using them as the code memory could increase the worst case execution time of the system. In this paper, a new code memory architecture for non-volatile memories is proposed which reduces the effective memory access latency by employing memory access interleaving technique. Unlike common instruction access latency improvement techniques such as prefetching and... 

Worst case execution time and energy consumption are two of the most important design constraints of real-time embedded systems and memory subsystem has a major impact on both of them. Therefore, many recent studies have tried to improve the memory subsystem of embedded systems by using emerging non-volatile memories instead of conventional memories such as SRAM and DRAM. Indeed, the low leakage power dissipation and improved density of emerging non-volatile memories make them prime candidates for replacing the conventional memories. However, accessing these memories imposes performance and energy overhead and using them as the instruction memory could increase the worst case execution time,... 

Using multiple antennas at the transmit and receive sides of a passive radar brings both the benefits of MIMO radar and passive radar. However one of the obstacles arisen in such configuration is the receive antennas placement in proper positions so that the radar performance is improved. Here we just consider the case of positioning one receiver among multiple illuminators of opportunity. Indeed it is a start for the solution of optimizing the geometry of the multiple receivers in a passive radar  

SbCl3 supported on montmorillonite K-10 is an efficient catalyst for the ring opening of epoxides with aromatic amines under solvent-free conditions and microwave irradiation to give the corresponding b-amino alcohols in high yields with high regioselectivity  

In this paper, we consider an integrated sensing and communication (ISAC) system with wireless power transfer (WPT) where an unmanned aerial vehicle (UAV)-based radar serves a group of energy-limited communication users in addition to its sensing functionality. In this architecture, the radar senses the environment in phase 1 (namely sensing phase) and mean-while, the communications users (nodes) harvest and store the energy from the radar transmit signal. The stored energy is then used for information transmission from the nodes to UAV in phase 2, i.e., uplink phase. Performance of the radar system depends on the transmit signal as well as the receive filter; the energy of the transmit... 

One of the important obstacles in MIMO (Multiple Input Multiple Output) radars is the issue of designing proper transmit signals. Indeed, the capability of signal design is a significant advantage in MIMO radars, through which, the system can achieve much better performance. Many different aspects of this performance improvement have been considered yet, and the transmit signals have been designed to attain such goal, e.g., getting higher SNR or better detector's performance at the receiver. However, an important tool for evaluating the radar's performance is its ambiguity function. In this paper, we consider the problem of transmit signal design, in order to optimize the ambiguity function... 

Two gains play key roles in recently developed MIMO wireless communication systems: "spatial diversity" gain and "spatial multiplexing" gain. The diversity gain refers to the capability to decrease the error rate of the MIMO channel, while the multiplexing gain implicitly refers to the amount of increase in the capacity of the MIMO channel. It has been shown that there is a fundamental tradeoff between these two types of gains, meaning interplay between increasing reliability (via an increase in the diversity gain) and increasing data rate (via an increase in the multiplexing gain). On the other hand, recently, MIMO radars have attracted much attention for their superior ability to enhance...