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    Design and Implementation of a Linear, 1 Watt, High Efficiency Power Amplifier with Controllable Output Power for UHF-RFID Application

    , M.Sc. Thesis Sharif University of Technology Sadeghi, Sanaz (Author) ; Sharifbakhtiar, Mehrdad (Supervisor)
    Abstract
    Design and implementation of an efficient, 1 Watt, linear power amplifier (PA) with CMOS technology for UHF-RFID applications is presented in this thesis. Poor quality factor of inductors, high substrate noise and low breakdown voltage of CMOS, makes the implementation of Watt-level PAs challenging on this technology. Also the trade-off between linearity and efficiency, further hardens achieving an efficient high power linear PA. So the literature was reviewed first to come up with the appropriate structure of a linearized efficient PA. Afterwards, the structure was reformed and optimized for the application mentioned above with reasonable stability margins. Baseband relevant blocks were... 

    Design of a Wide Band Power Amplifier for Power DAC

    , M.Sc. Thesis Sharif University of Technology Hassani, Keyvan (Author) ; Sharifbakhtiar, Mehrdad (Supervisor)
    Abstract
    Today’s radio transmitters must be able to send information in several standards. One problem involved in these wide band electronic systems lies in its end part, ie power amplifier. To have a broad band width either switching must be made among several power amplifiers with narrow band width (tuned) or the transistor part of power amplifier must be the same and single and selection be made only among matching networks. In this thesis, a power amplifier with broad band width without requiring a matching network has been designed and laid out. Also considering the low breakdown voltage of the gate oxide of the today’s standard CMOS transistors, it is very difficult to get a high output power... 

    Multi-Standard Transmitter with Wideband Power Amplifier

    , M.Sc. Thesis Sharif University of Technology Mohin, Shahabeddin (Author) ; Sharifbakhtiar, Mehrdad (Supervisor)
    Abstract
    In this thesis, we exploit N-path architecture in multi-standard transmitter in order to reduce the number of power amplifiers and matching networks. First, a new model of this transmitter is developed and simplified to improve its performance in operating frequency,power consumption and power efficiency . The model is then used for computer simulations of the proposed system for a variety of different modulations. Eight clock signals with consecutive phase difference of 2π/8 are generated by a divider and are applied to the power amplifier. The power amplifier is fullydigital. This removes the need for analog mixers and converts the transmitter to a fully digital transmitter. The proposed...