Sharif Digital Repository

An X-band core chip is designed and fabricated in 0.18-μm CMOS technology, which can significantly reduce the monolithic microwave integrated circuit count required for realizing an active beam-former T/R module. The core chip consists of two RX/TX paths, each of which includes a 6-b phase shifter, a 6-b attenuator, along with two input and output amplifiers. A new architecture for realizing such a core chip system and a low loss circuit for 5.625° phase shift block are proposed. The overall rms phase and gain errors are better than 2° and 0.25 dB, respectively, in both RX/TX paths. The gain of each path is around 12 dB, while the output 1-dB compression point is higher than 10 dBm over the... 

A highly linear X-band low-noise amplifier (LNA) is proposed and implemented in a standard 0.18-μm CMOS technology. The LNA features both high and low-gain operation modes. In its normal high-gain mode, the LNA shows a small-signal gain of 13.6 dB with an IIP3 of +9.5 dBm and a noise figure of 4.7 dB. The two-stage amplifier draws 90 mA from the 3.3V power supply to achieve +14.8 dBm output P1dB (+2.2 dBm input P1dB). In the low-gain mode, the gain is reduced by about 10 dB to further enhance the linearity and to accommodate very large blockers. Accordingly, the input P1dB is enhanced to +13.7 dBm while the noise figure is increased by 8.1 dB. A technique is also introduced to maintain the... 

This paper presents the design and implementation of a bidirectional distributed amplifier (BDDA) in a 0.18- boldsymbol mu ext{m} CMOS process. The performance of the BDDA is theoretically analyzed, and the optimum number of gain stages ( n-{ ext {opt}} ), maximum achievable power gain ( G-{P} ), and circuit bandwidth are formulated. In addition, a new formula for proper choice of the number of DA stages (i.e., n ) is offered where dc-power consumption of the circuit ( P-{ ext {dc}} ) is also considered. This formula optimizes G-{P}/P-{ ext {dc}} , and it is preferred over the conventional n-{ ext {opt}} formula. To validate the theoretical analyses, a 2-12-GHz BDDA with high output 1-dB... 

This paper presents an unilateralization technique for distributed amplifiers (DAs) based on the transformer coupling between the gate and drain lines. Theoretical analysis of the DA indicates that the voltage waves in the gate and drain lines can be described by a system of linear partial differential equations. The transformer coupling between the lines allows for cancellation of the reverse transmission coefficient of the system. There is an optimal value for the coupling coefficient between the lines that unilateralizes the DA. This optimal coupling coefficient is derived in terms of the gate-drain capacitance and capacitances of the gate and drain lines. Using the proposed technique,... 

The transformer-feedback (TRFB) interstage bandwidth enhancement technique for broadband multistage amplifiers is presented. Theory of the TRFB bandwidth enhancement and the design conditions for maximum bandwidth, maximally flat gain, and maximally flat group delay are provided. It is shown that the TRFB bandwidth enhancement can provide higher bandwidth compared to the conventional techniques based on reactive impedance matching networks. A three-stage low-noise amplifier (LNA) monolithic microwave integrated circuit with the TRFB between its consecutive stages is designed and implemented in a 0.1-μ m GaAs pHEMT process. The TRFB is realized by coupling between the drain bias lines of... 

A 6-bit passive phase shifter for 2.5- to 3.2-GHz frequency band has been designed and implemented in a standard 0.18- μm CMOS technology. A new switched-network topology has been proposed for implementing the 5.625 ° phase shift step. The insertion loss of the circuit is compensated with an on-chip bidirectional amplifier. The measured return losses of the circuit are better than 8 dB with output 1-dB compression point of +9.5 dBm in the transmit mode and noise figure of 7.1 dB in the receive mode. The fabricated phase shifter demonstrates an average rms phase error of less than 2° over the entire operation bandwidth, which makes it suitable for high-precision applications  

Design techniques to enhance bandwidth and linearity of broadband multistage low-noise amplifiers (LNAs) are presented. A feedback amplifier circuit is proposed to compensate for transistor gain roll-off with frequency in other amplifier stages and extend overall bandwidth. Moreover, a transistor width tapering in a multistage LNA is applied to improve linearity. These techniques are adopted in a three-stage monolithic microwave integrated circuit (MMIC) LNA implemented in a 0.1-μm GaAs pHEMT process. The LNA features 18-43 GHz bandwidth, 21.6 dB average gain, and 1.8-2.7 noise figure (NF). It exhibits output 1-dB compression point of 11.5 dBm at 30 GHz and consumes 70 mA bias current from a...