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    Energy consumption analysis of the stepwise adiabatic circuits

    , Article Microelectronics Journal ; Volume 104 , October , 2020 Khorami, A ; Saeidi, R ; Sharif University of Technology
    Elsevier Ltd  2020
    Abstract
    In this paper, an analytic model of the energy consumption of the Stepwise Adiabatic Circuits (SAC) when it is possible to discharge the load capacitor is proposed. Using this model, analytical derivations are calculated which shows us the power saving of the SACs. Using analytical derivations, the sizing of a capacitor tank is determined for a desired energy saving. For example, the derivations predict that if the sizing of the 3-step series tank capacitors is equal to the load capacitor, the power saving is 55%. Also, if the sizing of the tank is very large the energy saving of a 3-step stepwise charging is equal to 66.7%. Several Simulations in 0.18μm CMOS technology prove the accuracy of... 

    Evaluating and Improving the Reliability of Reversible Adiabatic Logic Styles

    , M.Sc. Thesis Sharif University of Technology Akbar, Reza (Author) ; Ejlali, Alireza (Supervisor)
    Abstract
    Adiabatic logic families are a group of logic circuits which operate based on adiabatic principles to tremendously reduce power consumption. These families have basic difference with common logic families in transistor level structure and there signals are not quadrangular but trapezoidal. Also, in these systems the source lines and clock pulse are the same. Research on Adiabatic families needs theoretical information in reversible computing. So we will start this project with explaining fundamental information in this field. After that some of these logic families are introduced and three important and widely used of them (SCRL-RERL-2LAL) are chosen to simulate. In each of these families... 

    Improving the energy efficiency of reversible logic circuits by the combined use of adiabatic styles

    , Article Integration, the VLSI Journal ; Volume 44, Issue 1 , January , 2011 , Pages 12-21 ; 01679260 (ISSN) Khatir, M ; Ejlali, A ; Moradi, A ; Sharif University of Technology
    2011
    Abstract
    One of the most prominent issues in fully adiabatic circuits is the breaking reversibility problem; i.e., non-adiabatic energy dissipation in the last stage adiabatic gates whose outputs are connected to external circuits. In this paper, we show that the breaking reversibility problem can result in significant energy dissipation. Subsequently, we propose an efficient technique to address the breaking reversibility problem, which is applicable to the usual fully adiabatic logic such as 2LAL, SCRL, and RERL. Detailed SPICE simulations are used to evaluate the proposed technique. The experimental results show that the proposed technique can considerably reduce (e.g., about 74% for RERL, 35% for... 

    One-dimensional adiabatic circuits with inherent charge recycling

    , Article Electronics Letters ; Volume 51, Issue 14 , July , 2015 , Pages 1056-1058 ; 00135194 (ISSN) Khorami, A ; Sharifkhani, M ; Sharif University of Technology
    Institution of Engineering and Technology  2015
    Abstract
    A new switching method for the stabilisation of a one-dimensional capacitor array tank for the stepwise charging of a load capacitor is presented. In this method, the tank capacitor configuration is rearranged in a circular manner once the charging process of a load capacitor finishes and before the charging process of a new load capacitor begins. Unlike previously reported methods, this method does not require backward switching for the stabilisation of tank capacitor voltages. Hence, the proposed method reduces the number of charging process steps by a factor of up to 2 compared with the conventional method. Moreover, since the tank recycles its charge inherently, the capacitive load can... 

    General Characterization Method and a Fast Load-Charge-Preserving Switching Procedure for the Stepwise Adiabatic Circuits

    , Article IEEE Transactions on Circuits and Systems I: Regular Papers ; Volume 63, Issue 1 , 2016 , Pages 80-90 ; 15498328 (ISSN) Khorami, A ; Sharifkhani, M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc 
    Abstract
    An analytical method is presented to characterize stepwise adiabatic circuits (SACs). In this method, the SACs are modeled as a discrete time system. Unlike previous methods, the stability is verified for arbitrary load capacitor ratios. Moreover, this method presents analytical derivations to offer an area/energy efficient design methodology. MATLAB simulations, post-layout simulations in the CMOS 0.18 μm technology, silicon measurements, and measurements based on discrete components confirm the precision of the analytical derivations. Using the proposed design methodology, a capacitive tank has been designed which reduces the energy consumption by 20% while the total size of the tank... 

    Circuit & Systematic Design of Low Power & High Speed SAR ADC

    , M.Sc. Thesis Sharif University of Technology Khorami, Ata (Author) ; Sharifkhani, Mohammad (Supervisor)
    Abstract
    SAR ADC is a data converter which is based on binary search to convert an analog signal to a digital signal. Unlike other converters like pipeline, most of its constituent parts are digital, and hence scalable with process and consume less power, moreover can have better speed and power performance. With advanced technologies, namely 45nm and 32 nm CMOS, SAR ADCs are preferable as they consume much less power and area, therefore well-suited for portable applications, as opposed to Flash and Pipleline converters.
    The main drawback of this type of converter is its limited speed which is due to the fact that one clock cycle is required to evaluate each bit. As a result, there is a... 

    A comprehensive analysis on the resilience of adiabatic logic families against transient faults

    , Article Integration ; Volume 72 , May , 2020 , Pages 183-193 Narimani, R ; Safaei, B ; Ejlali, A ; Sharif University of Technology
    Elsevier B.V  2020
    Abstract
    With the emergence of various battery operated technologies in different computing domains and the challenge of heating in such technologies, the issue of energy dissipation has become more critical than ever before. In such systems, energy constraints in one hand, and heat generation, on the other hand, necessitates the employment of energy efficient technologies in the fabrication of digital circuits. One possible solution for mitigating the energy dissipation in digital circuits is the use of adiabatic families in the process of designing computing devices. Adiabatic circuits are designed mainly based on the principles of thermodynamics and provide a paradigm shift in the design of... 

    A low-waste reliable adiabatic platform

    , Article Computers and Electrical Engineering ; Volume 89 , 2021 ; 00457906 (ISSN) Narimani, R ; Safaei, B ; Ejlali, A ; Sharif University of Technology
    Elsevier Ltd  2021
    Abstract
    Given the importance of reducing energy consumption and the challenge of heat generation in classic CMOS circuits, adiabatic circuits are believed as an appropriate alternative. Most of the adiabatic circuit families come with a dual-rail structure, which provides them with an inherent hardware redundancy. Although this redundancy could be used for improving their reliability, no studies have been previously conducted to exploit this feature. In this regard, in this paper, we show that by exploiting the inherent hardware redundancy in adiabatic circuits, their reliability could be improved, while imposing a relatively low amount of energy overhead. Subsequently, with utilizing the outcome...