Sharif Digital Repository

A specific class of differential cryptanalytic approach, known as Related Key Boomerang Attack, has been successfully applied to several symmetric cryptographic primitives in particular encryption schemes such as Advanced Encryption Standard (AES). In this paper, we propose a new related-key boomerang attack on 8-round AES-256, a couple of ones on 9-round following the work of Gorski et al. In the first one, we attacked 8-round AES-256 with the time complexity of 279 and the data complexity of 259. The extended 8-round attack on 9-round AES-256 is more efficient than previous attacks from both time and data complexity perspectives  

In recently proposed cipher algorithms, power functions over finite fields and specially inversion functions play an important role in the S-box design structure. In this study, a new systematic efficient method is introduced to cryptanalyse (to simplify and approximate) such S-boxes. This method is very simple and does not need any heuristic attempt and can be considered as a quick criterion to find some simple approximations. Using this new method, some approximations can be obtained for advanced encryption standard (AES) like S-boxes, such as AES, Camellia, Shark and so on. Finally as an application of this method, a simple linear approximation for AES S-box is presented. © The... 

A specific class of differential cryptanalytic approach, named as impossible differential attack, has been successfully applied to several symmetric cryptographic primitives in particular encryption schemes such as Advanced Encryption Standard (AES). Such attacks exploit differences that are impossible at some intermediate state of the cipher algorithm. The best-known impossible differential attack against AES-128 has applied to six rounds. An attack on AES-128 up to seven rounds is proposed. The proposed attack requires 2115.5 chosen plaintexts and 2109 bytes of memory and performs 2119 seven-round AES encryptions. This is also the best-known attack on a reduced version of the AES-128 till... 

In this paper we describe two differential fault attack techniques against Advanced Encryption Standard (AES). We propose two models for fault occurrence; we could find all 128 bits of key using one of them and only 6 faulty ciphertexts. We need approximately 1500 faulty ciphertexts to discover the key with the other fault model. Union of these models covers all faults that can occur in the 9th round of encryption algorithm of AES-128 cryptosystem, One of main advantage of proposed fault models is that any fault in the AES encryption from start (AddRoundKey with the main key before the first round) to MixColumns function of 9th round can be modeled with one of our fault models. These models... 

This research aims to represent a novel approach to detect malicious nodes in Ad-hoc On-demand Distance Vector (AODV) within the next-generation smart cities. Smart city applications have a critical role in improving public services quality, and security is their main weakness. Hence, a systematic multidimensional approach is required for data storage and security. Routing attacks, especially sinkholes, can direct the network data to an attacker and can also disrupt the network equipment. Communications need to be with integrity, confidentiality, and authentication. So, the smart city and urban Internet of Things (IoT) network, must be secure, and the data exchanged across the network must... 

The development of extremely-constrained embedded systems having sensitive nodes such as RFID tags and nanosensors necessitates the use of lightweight block ciphers. Nevertheless, providing the required security properties does not guarantee their reliability and hardware assurance when the architectures are prone to natural and malicious faults. In this letter, error detection schemes for lightweight block ciphers are proposed with the case study of XTEA (eXtended TEA). Lightweight block ciphers such as XTEA, PRESENT, SIMON, and the like might be better suited for low-resource deeply-embedded systems compared to the Advanced Encryption Standard. Three different error detection approaches... 

High throughput AES encryption/decryption is a necessity for many of modern embedded systems. This article presents a high performance yet cost efficient AES system. Maestro can be used in a wide range of embedded applications with various requirements and limitations. Maestro is about one million times faster than the pure software implementation. The Maestro architecture is composed of two major components; the soft processor aimed at system initialization and control, and the hardware AES engine for high performance AES encryption/decryption. A ten stage implicit pipelined architecture is considered for the AES engine. Two novel techniques are proposed in design of AES engine which enable... 

Advance Encryption Standard (AES), has received significant interest over the past decade due to its performance and security level. In this paper, we propose a compact 8-bit AES crypto-processor for area constrained and low power applications where both encryption and decryption is needed. The cycle count of the design is the least among previously reported 8-bit AES architectures and the throughput is 203 Mbps. The AES core consumes 5.6k gates in 0.18 μm standard-cell CMOS technology. The power consumption of the core is 49 μW/MHz at 128 MHz which is the minimum power reported thus far  

Advanced Encryption Standard (AES) is the most popular symmetric encryption method, which encrypts streams of data by using symmetric keys. The current preferable AES architectures employ effective methods to achieve two important goals: protection against power analysis attacks and high-throughput. Based on a different architectural point of view, we implement a particular parallel architecture for the latter goal, which is capable of implementing a more efficient pipelining in field-programmable gate array (FPGA). In this regard, all intermediate registers which have a role for unrolling the main loop will be removed. Also, instead of unrolling the main loop of AES algorithm, we implement...