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    Adaptive neuro-fuzzy inference system based automatic generation control

    , Article Electric Power Systems Research ; Volume 78, Issue 7 , 2008 , Pages 1230-1239 ; 03787796 (ISSN) Hosseini, S. H ; Etemadi, A. H ; Sharif University of Technology
    2008
    Abstract
    Fixed gain controllers for automatic generation control are designed at nominal operating conditions and fail to provide best control performance over a wide range of operating conditions. So, to keep system performance near its optimum, it is desirable to track the operating conditions and use updated parameters to compute control gains. A control scheme based on artificial neuro-fuzzy inference system (ANFIS), which is trained by the results of off-line studies obtained using particle swarm optimization, is proposed in this paper to optimize and update control gains in real-time according to load variations. Also, frequency relaxation is implemented using ANFIS. The efficiency of the... 

    Analyzing chor specifications by translation into FSP

    , Article Electronic Notes in Theoretical Computer Science ; Volume 255 , 2009 , Pages 159-176 ; 15710661 (ISSN) Roohi, N ; Salaun, G ; Mirian, H ; Sharif University of Technology
    2009
    Abstract
    A choreography specifies activities and interactions among a set of services from a global point of view. From this specification, local implementations or peers can be automatically generated. Generation of peers that precisely implement the choreography specification is not always possible: this problem is known as realizability. This paper presents an encoding of the Chor choreography calculus into the FSP process algebra. This encoding allows to: (i) validate and verify Chor specifications using the FSP toolbox (LTSA), (ii) generate peer protocols from its choreography specified in Chor, (iii) test for realizability of the Chor specification, and (iv) generate Java code from FSP for... 

    Assertion-based debug infrastructure for SoC designs

    , Article 19th International Conference on Microelectronics, ICM, Cairo, 29 December 2007 through 31 December 2007 ; 2007 , Pages 137-140 ; 9781424418473 (ISBN) Gharehbaghi, A.M ; Babagoli, M ; Hessabi, S ; Sharif University of Technology
    2007
    Abstract
    In this paper, an infrastructure for debug of complex SoCs that employs assertions is introduced. The proposed infrastructure combines traditional off-chip analysis techniques with on-chip at-speed debug facilities. The main part of on-chip debug hardware consists of data and transaction monitors. The monitor hardware is automatically generated by synthesizing the assertions that were used for verification and validation before manufacturing. We have integrated the proposed method in a system-level design methodology. By synthesizing various assertions from different kinds in a case study we have studied the overhead of our method. © 2007 IEEE  

    Application of edge theorem for robust stability analysis of a power system with participating wind power plants in automatic generation control task

    , Article IET Renewable Power Generation ; Volume 11, Issue 7 , 2017 , Pages 1049-1057 ; 17521416 (ISSN) Toulabi, M ; Bahrami, S ; Ranjbar, A. M ; Sharif University of Technology
    Institution of Engineering and Technology  2017
    Abstract
    This study investigates the dynamic participation of wind power plants (WPPs) in the automatic generation control (AGC) task. The pre-specified model of wind farm in the AGC studies has been used. It is shown that operating of WPPs at the command mode results in a significant improvement in the frequency behaviour of power system due to their faster response. However, the WPPs may change their operation mode from the command mode to the maximum power point mode according to the wind speed conditions and load variations. This reduces the improvement in the frequency response. In this condition, the shortage in the wind power should be compensated by the conventional units. Thus, the share of... 

    A performance and functional assertion-based verification methodology at transaction-level

    , Article 19th International Conference on Microelectronics, ICM, Cairo, 29 December 2007 through 31 December 2007 ; 2007 , Pages 133-136 ; 9781424418473 (ISBN) Hatefi Ardakani, H ; Gharehbaghi, A. M ; Hessabi, S ; Sharif University of Technology
    2007
    Abstract
    In this paper, we present an assertion-based verification methodology for system-level design. Transactionlevel concepts are integrated with an assertion language to introduce a useful, effective and familiar assertion description language. Our assertion verification language is capable of specifying system-level assertions for validating performance as well as functional properties. Proper-ties can be verified using offline simulation trace analysis. C++ trace checkers are automatically generated to validate particular simulation runs or to analyze their performance characteristic(s). Using a JPEG decoder as a case study, we demonstrate that the assertion-based verification is highly useful... 

    Syntactic tree kernels for event-time temporal relation learning

    , Article Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) ; Volume 6562 LNAI , 2011 , Pages 213-223 ; 03029743 (ISSN) ; 9783642200946 (ISBN) Mirroshandel, S. A ; Khayyamian, M ; Ghassem Sani, G ; Sharif University of Technology
    Abstract
    Temporal relation classification is one of the contemporary demanding tasks in natural language processing. This task can be used in various applications such as question answering, summarization, and language specific information retrieval. In this paper, we propose an improved algorithm for classifying temporal relations between events and times, using support vector machines (SVM). Along with gold-standard corpus features, the proposed method aims at exploiting useful syntactic features, which are automatically generated, to improve accuracy of the classification. Accordingly, a number of novel kernel functions are introduced and evaluated for temporal relation classification. The result... 

    Using syntactic-based kernels for classifying temporal relations

    , Article Journal of Computer Science and Technology ; Volume 26, Issue 1 , 2010 , Pages 68-80 ; 10009000 (ISSN) Mirroshandel, S. A ; Ghassem Sani, G ; Khayyamian, M ; Sharif University of Technology
    Abstract
    Temporal relation classification is one of contemporary demanding tasks of natural language processing. This task can be used in various applications such as question answering, summarization, and language specific information retrieval. In this paper, we propose an improved algorithm for classifying temporal relations, between events or between events and time, using support vector machines (SVM). Along with gold-standard corpus features, the proposed method aims at exploiting some useful automatically generated syntactic features to improve the accuracy of classification. Accordingly, a number of novel kernel functions are introduced and evaluated. Our evaluations clearly demonstrate that... 

    Using tree kernels for classifying temporal relations between events

    , Article PACLIC 23 - Proceedings of the 23rd Pacific Asia Conference on Language, Information and Computation, 3 December 2009 through 5 December 2009 ; Volume 1 , 2009 , Pages 355-364 ; 9789624423198 (ISBN) Mirroshandel, S. A ; Ghassem Sani, G. R ; Khayyamian, M ; Sharif University of Technology
    Abstract
    The ability to accurately classify temporal relations between events is an important task in a large number of natural language processing and text mining applications such as question answering, summarization, and language specific information retrieval. In this paper, we propose an improved way of classifying temporal relations, using support vector machines (SVM). Along with gold-standard corpus features, the proposed method aims at exploiting useful syntactic features, which are automatically generated, to improve accuracy of the SVM classification method. Accordingly, a number of novel kernel functions are introduced and evaluated for temporal relation classification. Our evaluations... 

    Personalized computational human phantoms via a hybrid model-based deep learning method

    , Article 15th IEEE International Symposium on Medical Measurements and Applications, MeMeA 2020, 1 June 2020 through 3 June 2020 ; July , 2020 Khodajou Chokami, H ; Bitarafan, A ; Dylov, D. V ; Soleymani Baghshah, M ; Hosseini, S. A ; IEEE; IEEE Instrumentation and Measurement Society; IEEE Sensors Council Italy Chapter; Politecnica di Bari; Politecnico di Torino; Societa Italiana di Analisi del Movimento in Clinica ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2020
    Abstract
    Computed tomography (CT) simulators are versatile tools for scanning protocol evaluation, optimization of geometrical design parameters, assessment of image reconstruction algorithms, and evaluation of the impact of future innovations attempting to improve the performance of CT scanners. Computational human phantoms (CHPs) play a key role in simulators for the radiation dosimetry and assessment of image quality tasks in the medical x-ray systems. Since the construction of patient-specific CHPs can be both difficult and time-consuming, nominal standard/reference CHPs have been established, yielding significant discrepancies in the special design and optimization demands of patient dose and... 

    Delay compensation of demand response and adaptive disturbance rejection applied to power system frequency control

    , Article IEEE Transactions on Power Systems ; Volume 35, Issue 3 , 2020 , Pages 2037-2046 Hosseini, S. A ; Toulabi, M. R ; Salehi Dobakhshari, A ; Ashouri Zadeh, A ; Ranjbar, A. M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2020
    Abstract
    In this paper, a modified frequency control model is proposed, where the demand response (DR) control loop is added to the traditional load frequency control (LFC) model to improve the frequency regulation of the power system. One of the main obstacles for using DR in the frequency regulation is communication delay which exists in transferring data from control center to appliances. To overcome this issue, an adaptive delay compensator (ADC) is used in order to compensate the communication delay in the control loop. In this regard, a weighted combination of several vertex compensators, whose weights are updated according to the measured delay, is employed. Generating the phase lead is the... 

    The ODYSSEY approach to early simulation-based equivalence checking at ESL level using automatically generated executable transaction-level model

    , Article Microprocessors and Microsystems ; Volume 32, Issue 7 , 2008 , Pages 364-374 ; 01419331 (ISSN) Goudarzi, M ; Hessabi, S ; MohammadZadeh, N ; Zainolabedini, N ; Sharif University of Technology
    2008
    Abstract
    Design technology is expected to rise to electronic system-level (ESL). This necessitates new techniques and tools for synthesizing ESL designs and for verifying them before and after ESL synthesis. A promising verification strategy for future very complex designs is to initially verify the design at the highest level of abstraction, and then check the equivalence of the lower level automatically generated models against that initial golden model. We present one such approach to simulation-based functional verification implemented in our ESL design methodology called ODYSSEY. Our ESL synthesis tool generates a transaction-level model (TLM) at TLM level 2 (i.e., design with partial timing)...