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    Compensation method for multistage opamps with high capacitive load using negative capacitance

    , Article IEEE Transactions on Circuits and Systems II: Express Briefs ; Volume 63, Issue 10 , 2016 , Pages 919-923 ; 15497747 (ISSN) Rasekh, A ; Sharif Bakhtiar, M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc 
    Abstract
    It is shown that negative capacitance (NC) circuits can be systematically used to improve the gain-bandwidth product of the operational amplifiers (opamps). The NC circuit moves the nondominant pole of the opamp to higher frequency by decreasing the parasitic capacitance of the critical node. The impedance at the input of the NC circuits is neither purely capacitive nor negative at all frequencies. A design guide is presented by deriving the circuit model for a conventional NC circuit and investigating the extent of the improvement that can be achieved in a circuit by the use of the NC circuit. The model is then used to present the design guide for widebanding the multistage opamps with... 

    One-dimensional adiabatic circuits with inherent charge recycling

    , Article Electronics Letters ; Volume 51, Issue 14 , July , 2015 , Pages 1056-1058 ; 00135194 (ISSN) Khorami, A ; Sharifkhani, M ; Sharif University of Technology
    Institution of Engineering and Technology  2015
    Abstract
    A new switching method for the stabilisation of a one-dimensional capacitor array tank for the stepwise charging of a load capacitor is presented. In this method, the tank capacitor configuration is rearranged in a circular manner once the charging process of a load capacitor finishes and before the charging process of a new load capacitor begins. Unlike previously reported methods, this method does not require backward switching for the stabilisation of tank capacitor voltages. Hence, the proposed method reduces the number of charging process steps by a factor of up to 2 compared with the conventional method. Moreover, since the tank recycles its charge inherently, the capacitive load can... 

    A body biasing method for charge recovery circuits: Improving the energy efficiency and DPA-immunity

    , Article Proceedings - IEEE Annual Symposium on VLSI, ISVLSI 2010, 5 July 2010 through 7 July 2010 ; July , 2010 , Pages 195-200 ; 9780769540764 (ISBN) Khatir, M ; Ejlali, A ; Sharif University of Technology
    2010
    Abstract
    Charge recovery is a promising concept to design (cryptographic) VLSI circuits with low energy dissipation. However, unsatisfactory designs of proposed logic cells degrade its theoretical efficiency significantly both in its energy consumption and the resistance against differential power analysis attacks (DPA-attacks). Short circuit dissipation and non-adiabatic discharging of capacitance loads are the two major sources of this degradation which are addressed in this paper. In order to reduce these dissipation significantly, we manipulate threshold voltage of circuits transistors by body biasing. To evaluate the efficiency of our method we select a common charge recovery logic called 2N2N2P...