Sharif Digital Repository

Fault tolerant ability is one of the most important tasks in high power converters. In this paper, a comparison between conventional fault tolerant methods is done for four applicable methods. For this purpose, their performance is investigated in specific case study and simulation results are used to illustrate their advantages and disadvantages. The most important features taken into account are maximum available voltage, harmonic distortion of output voltage and input current, and magnitude of common mode voltage. Finally, a decision algorithm based on the results is suggested to select suitable method to control inverter under specific faulty condition  

Multilevel converters are mainly used in high power applications (usually more than a few hundred kW). It is therefore important that they can continue working under faulty condition. In this paper, a new method is proposed to improve performance of CHB inverter under faulty condition. The proposed method will be compared with existing methods in term of voltage availability. The converter is simulated in Simulink and the results are provided. These results confirm the effectiveness of the proposed scheme, and are in accordance with the theoretical results  

Fault detection is one of the most important tasks in fault tolerant converters. In this paper, a new method is proposed to detect the faulty cell in a cascaded H-bridge multilevel inverter. The detection technique is based on comparison of the output voltage with reference voltage made by using switching control pulses and DC-Link voltage. Because of the simplicity of this method, it is possible to use a single field-programmable gate array (FPGA) to implement this method and inverter control. The simulation and experimental results confirm the effectiveness of the proposed fault detection technique  

This paper presents a single-phase Cascaded H-Bridge (CHB) inverter for photovoltaic applications. The proposed control strategy permits the optimum control of each string of PV panels in different insolation conditions. Based on the presented mathematical analysis, an analytic constraint is derived to check the stable operation of the inverter. A modified MPPT control strategy is also proposed based on this new condition. This strategy enhances the stability margins of the system by changing the operating point of some PV arrays. In this approach, the extracted power from high power cell is reduced to prevent instability issue and to avoid injection of highly distorted current into the... 

In this paper, the whale optimization algorithm is proposed for harmonics elimination in a cascaded multilevel inverter. In selective harmonic elimination pulse width modulation, the selected low-order harmonics are eliminated by solving nonlinear equations, while the fundamental of output waveform is adjusted to a desired value. In this paper, whale optimization algorithm is applied to a 7-level cascaded H-bridge inverter to solve the equations. Also, it was validated by experimental results, since this algorithm has an ability to search in entire solution space, the probability of catching a global best solution is very high. This method has higher accuracy and probability of convergence... 

In this paper, the whale optimization algorithm is proposed for harmonics elimination in a cascaded multilevel inverter. In selective harmonic elimination pulse width modulation, the selected low-order harmonics are eliminated by solving nonlinear equations, while the fundamental of output waveform is adjusted to a desired value. In this paper, whale optimization algorithm is applied to a 7-level cascaded H-bridge inverter to solve the equations. Also, it was validated by experimental results, since this algorithm has an ability to search in entire solution space, the probability of catching a global best solution is very high. This method has higher accuracy and probability of convergence... 

In This paper, a new post-fault control method for symmetric cascaded H-bridge multilevel inverters (CHB-MLIs) is proposed with the aim of the development of CHB-MLIs performance under faulty conditions due to decrease in common mode voltage (CMV). In other words, this technique addresses the exclusive process to select the optimal post-fault state among all available states possess the same amplitude of the output line to line voltages. As a result, this process leads to provide computed phase voltages references to apply to PWM block. Hence, this technique leads to decrease the common mode voltage and eliminate it under some desired output line-line voltages. Finally, the feasibility of...