Sharif Digital Repository

Artificial neural network was used to calculate the performance of a model supercapacitor as signified by the power density, energy density and utilization to the synthetic, intrinsic and operating characteristics. A four-layer neural net having two hidden layers having 6 and 15 nodes was found to be well capable of simulating the capacitor performance with the convergence achieved often a relatively small number of epochs. As for the input parameters, crystal size, surface lattice length, exchange current density of the capacitor active material and the cell current employed while utilization, energy density and power density were the outputs. © 2006 Elsevier B.V. All rights reserved  

Based on the observation that dynamic occurrence of zeros in the cache access stream and cache-resident memory values of ordinary programs exhibit a strong bias towards zero, this paper presents a novel CMOS five-transistor SRAM cell (5T SRAM cell) for very high density and low power cache applications. This cell retains its data with leakage current and positive feedback without refresh cycle. Novel 5T SRAM cell uses one word-line and one bit-line and extra read-line control. The new cell size is 17% smaller than a conventional six-transistor SRAM cell using same design rules with no performance degradation. Simulation and analytical results show purposed cell has correct operation during... 

A hybrid current/voltage sense amplification scheme is proposed for high speed SRAMs. The scheme includes an offset cancellation technique which makes it robust against the current sense amplifier (CSA) mismatch. The offset cancellation allows for fast open loop operation of the differential CSA. A fourfold reduction of the cell access time is achieved compared to the conventional scheme under similar cell current and bitline capacitance. Thanks to its automatic turn off nature, the proposed CSA incurs zero static power without an auxiliary turn off circuit. The reduction of the charge redistribution on the bitlines offers a low bitline dynamic power consumption as well. In this work, the... 

the application of current sense amplifiers in scaled SRAM design is limited by two factors: the DC offset due to the device mismatch and limited voltage headroom. The presented scheme reduces the effect of offset by proposing an extra phase for offset cancellation before current sensing takes place. A twofold reduction of the cell access time is achieved compared to the conventional scheme under similar cell current and bitline capacitance. The offset cancellation phase takes place in parallel to the wordline decoding time in order to speed up the current sensing. The proposed scheme requires a small power budget due to a self shut off mechanism. In addition to presenting a comparison with... 

The conventional solar cell architectures include a p-n junction of c-Si sandwiched by rear and front contacts. The conventional approach features a complex as well as expensive procedure. Here, we propose a new architecture for p-n heterojunction solar cells prepared by a simple and cost-effective procedure. In this regard, (1) a silicon wafer underwent surface treatment through electrochemical anodization. To prepare a stick junction, (2) photoactive TiO2 nanoparticles were deposited over the porous layer by electrophoretic technique. Finally, (3) indium tin oxide (ITO) was sputtered. During the fabrication steps, we examined various anodization times ranging from 6 to 12 min to study the... 

Cu2ZnSnS4 (CZTS) is a good candidate for cost-effective perovskite solar cells (PSCs) due to its direct bandgap with a value of 1.4–1.5 eV. In this study, we investigate CZTS ink as an inorganic hole-transport-layer (HTL) in CsMAFAPbIBr mixed halide PSCs. We study the cell efficiency and hole extraction from the perovskite layer for different thicknesses of HTL. The optimized device exhibits better hole selectivity, and the best efficiency of the device (12.84%) is achieved for the CZTS layer with a thickness of 159 nm. The prepared samples were also tested by open-circuit voltage decay analysis and electrochemical impedance spectroscopies. Results show that the optimized device effectively...