Sharif Digital Repository

Recently, energy harvesting systems that utilize hybrid NVM-SRAM memory in their designs are introduced as a promising alternative for battery-operated systems. Since the ambient input power of an energy harvesting system fluctuates as the environmental conditions change, the system may stop the execution of programs until it receives enough energy to continue the execution. Resuming the execution of a program after the suspension may lead to data inconsistency in an energy harvesting system and threatens the correct functionality of the programs. In this article, we propose COACH, an energy-efficient consistency-aware memory scheme which guarantees the correct functionality and consistency... 

Reducing the size of the technology increases leakage power in Network-on-Chip (NoC) routers drastically. Power-gating, particularly in NoC routers, is one of the most efficient approaches for alleviating the leakage power. Although applying power-gating techniques alleviates NoC power consumption due to high proportion of idleness in NoC routers, since the timing behavior of packets is irregular, even in low injection rates, performance overhead in power-gated routers is significant. In this paper, we present SMART, a Scalable Mapping And Routing Technique, with virtually no area overhead on the network. It improves the irregularity of the timing behavior of packets in order to mitigate... 

Due to the battery-operated nature of embedded Mixed-Criticality Systems, simultaneous energy and reliability management is a cru-cial issue in designing these systems. We propose two comprehensive schemes, MC-2S and MC-4S, which tolerate permanent faults through exploiting the inherent redundancy of multicore systems for applying standby-sparing technique and maintaining the system re-liability against transient faults with low energy overhead. In these schemes, two copies of each high-criticality task are scheduled on different cores to guarantee their timeliness in case of permanent fault occurrence. In order to guarantee the quality of service of low-criticality tasks, in the MC-2S... 

Given the importance of reducing energy consumption and the challenge of heat generation in classic CMOS circuits, adiabatic circuits are believed as an appropriate alternative. Most of the adiabatic circuit families come with a dual-rail structure, which provides them with an inherent hardware redundancy. Although this redundancy could be used for improving their reliability, no studies have been previously conducted to exploit this feature. In this regard, in this paper, we show that by exploiting the inherent hardware redundancy in adiabatic circuits, their reliability could be improved, while imposing a relatively low amount of energy overhead. Subsequently, with utilizing the outcome... 

Due to the battery-operated nature of some embedded Mixed-Criticality Systems, simultaneous energy and reliability management is a crucial issue in designing these systems. We propose two comprehensive schemes, MC-2S and MC-4S, which exploit the standby-sparing technique to tolerate permanent faults through inherent redundancy of multicore systems and maintain the system's reliability against transient faults with low energy overhead. In these schemes, two copies of each high-criticality task are scheduled on different cores to guarantee their timeliness in case of permanent fault occurrence. To guarantee the quality of service of low-criticality tasks, in the MC-2S scheme, one backup copy...