Sharif Digital Repository

Energy consumption is one of the most crucial issues in embedded systems and memories are responsible for a considerable portion of it. Furthermore, leakage power is becoming the dominant part of total power consumption as the feature size of transistors is scaled down, therefore, the memory management must be improved in order to mitigate the negative effect of increased static power dissipation. In this study, a new memory architecture and a new data mapping algorithm are presented that reduce the energy consumption of multi-core embedded systems while respecting the timing constraints. We propose a novel two-level scratch-pad memory (SPM) based on STTRAM, which is a type of non-volatile... 

RT-level techniques are one of the most important categories of techniques employed for decreasing power consumption in digital systems. These techniques are usually applied in the HDL description of the system, however some of them are applicable automatically by the synthesis tools. Some of the most commonly used RT-level techniques include Operand isolation, Clock gating, Concurrency & Redundancy, Pre-computation and Pipeline for low power. However these techniques have been mostly employed in ASIC designs, and FPGAs have scarcely been addressed. Application of these techniques on FPGAs might need special considerations, since resources on FPGAs are inherently different than their ASIC... 

The number of transistors on a single chip is growing exponentially which results in a huge increase in consumed power and temperature. Parallel processing is a solution which concentrates on increasing the number of cores instead of improving single thread performance. Graphics Processing Units (GPUs) are parallel accelerators which are categorized as manycore systems. However, recent research shows that their consumed power and energy are increasing. In this research, we aim to propose methods to make GPGPUs energy effiecient. In this regard, we evaluated the detailed consummed power of GPGPUs. Our results show that memory sub-system is a critical bottelneck in terms of performance and... 

Energy consumption is one of the most improtant challenges in design of embedded systems and memory subsystem has signifcant role in this challenge. On-chip scratch-pad memories (SPM) provide a large potential for energy saving in memory subsystems used in embedded systems. However, due to the limited size of SPM, achieving reduced energy consumption necessitates proper memory partitioning and allocation, especially in multi-task and multicore embedded systems. Morever, conventional memories like SRAM have numerous problems such as their great role in occupation of die area and static energy.Therefore,exploiting emerging non-volatile memories like STT-MRAM and PCM can be very helpful in... 

Energy consumption is considered as one of the key constraints in the design of Embedded Systems. Exploiting abundant ambient energy offers a practical solution for designing embedded systems. In this regard, emerging trends are surging towards replacing battery-powered embedded systems in various different applications such as wearable systems, Internet of Things, and pervasive computing. Also, with the development and ommercialization of emerging Non-volatile memory technologies,the potential to reduce the static energy consumption and the ability to retain data in the absence of input energy, has become practically feasible for Embedded Systems. Consequently, recent researches have... 

Freeze desalination as a water refining method has attracted a lot of attention due to its potential in lowering process energy consumption compared to other methods. This method is based on the fact that the dissolved salt is drained from the saline water during its freezing. The current study conducts a parametric study on freezing saline water in a cylindrical container to investigate the impact of geometric and functional factors affecting the desalination quality. This has been done by examining the aforesaid factors in the form of dimensionless parameters such as thermal Grashof number, solutal Grashof number, and Jacob number. In addition, in order to improve the desalination, a novel... 

Due to the increasing development of digital systems based on limited energy sources (i.e. battery), energy efficiency has become one of the most important concerns in the design of these systems. The use of multi-core architecture is an effective solution for the problem of reducing energy consumption. Hence using it in digital systems has become more common. In addition, enabling methods for reducing energy consumption on processor, helps in making energy more efficient. DVFS and DPM are the two major methods used for reducing dynamic and static energy consumption of processors. The using of multi-core architecture due to the higher chip density, results the static and dynamic energy...