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    A low voltage 14-bit self-calibrated CMOS DAC with enhanced dynamic linearity

    , Article Analog Integrated Circuits and Signal Processing ; Volume 43, Issue 2 , 2005 , Pages 137-145 ; 09251030 (ISSN) Saeedi, S ; Mehrmanesh, S ; Atarodi, M ; Sharif University of Technology
    2005
    Abstract
    A 1-V CMOS current steering digital to analog converter with enhanced static and dynamic linearity is presented. The 14-bit static linearity is achieved by a background analog self calibration technique which is suitable for low voltage applications and does not require error measurement and correction circuits. To improve dynamic linearity at high frequencies a track/attenuate output stage is used at the DAC output. Integral and differential nonlinearities of the proposed DAC corresponding to 14-bit specification are less than 0.35 and 0.25 LSB respectively. The DAC is functional up to 400MS/s with SFDR better than 71 dB in the Nyquist band. The circuit has been designed and simulated in a...