Sharif Digital Repository

In this paper, we propose an algorithm to determine the active sliding mode controller parameters in synchronizing different chaotic systems. The resulted control parameters not only secure stability of the error systems, they can also be adjusted to obtain the desired rate of error convergence. Numerical simulations are presented to evaluate effectiveness of the proposed algorithm where the Lü system is implemented as the response (slave) system. © 2005 Elsevier Ltd. All rights reserved  

This paper presents a soft error-tolerant architecture to protect embedded processors register files. The proposed architecture is based on selectively duplication of the most vulnerable registers values in a cache memory embedded beside the processor register file so called register cache. To do this, two parity bits are added to each register of the processor to detect up to three contiguous errors. To recover the erroneous register value, two distinct cache memories are utilized for storing the redundant copy of the vulnerable registers, one for short lived registers and the other one for long lived registers. The proposed method has two key advantageous as compared to fully ECC protected... 

We apply the active sliding mode controller to synchronize two uncertain chaotic systems. Uncertainties are considered both in linear and nonlinear parts of the system dynamics. We have also studied the case that the signals are contaminated by measuring channel noise. It is shown that having some conditions on the uncertainties and noise magnitude, the closed loop stability can be guaranteed. The synchronization errors are shown to be confined into some bounded value. Numerical simulations are presented to evaluate the analysis and effectiveness of the controller. © 2006 Elsevier Ltd. All rights reserved  

With the continual scaling of feature size, system failure due to soft errors is getting more frequent in CMOS technology. Soft errors have particularly severe effects in static random-access memory (SRAM)-based reconfigurable devices (SRDs) since an error in SRD configuration bits can permanently change the functionality of the system. Since interconnect resources are the dominant contributor to the overall configuration memory upsets in SRD-based designs, the system failure rate can be significantly reduced by mitigating soft errors in routing fabric. This paper first presents a comprehensive analysis of SRD switch box susceptibility to short and open faults. Based on this analysis, we... 

Over the past few years, radiation-induced transient errors, also referred to as soft errors, have been a severe threat to the data integrity of high-end and mainstream processors. Recent studies show that cache memories are among the most vulnerable components to soft errors within high-performance processors. Accurate modeling of the Vulnerability Factor (VF) is an essential step towards developing cost-effective protection techniques for cache memory. Although Fault Injection (FI) techniques can provide relatively accurate VF estimations they are often very time consuming. To overcome the limitation, recent analytical models were proposed to compute the cache VF in a timely fashion. In... 

FlexRay communication protocol is expected to become the de-facto standard for distributed safety-critical systems. This paper classifies the effects of transient single bit-flip fault injections into the FlexRay communication controller. In this protocol, when an injected fault is activated, this may result in one or more error types, i.e.: Boundary violation, Conflict, Content, Freeze, Synchronization, Syntax, and Invalid frame. To study the activated faults, a FlexRay bus network, composed of four nodes, was modeled by Verilog HDL; and a total of 135,600 transient faults was injected in only one node, called the target node. The results show that only 9,342 of the faults (about 6.9%) were... 

FlexRay communication protocol is expected becoming the de-facto standard for distributed safetycritical systems. In this paper, transient single bit-flip faults were injected into the FlexRay communication controller to categorize and analyze the activatedfaults. In this protocol, an activated fault results in one or more error types which are Boundary violation, Conflict, Content, Freeze, Synchronization, and Syntax. To study the activated faults, a FlexRay bus network, composed of four nodes, was modeled by Verilog HDL; and a total of 135,600 transient faults were injected in only one node, where 9,342 (6.9%) of the faults were activated. The results show that the Synchronization error is...