Search for: fault-detection-algorithm
Fast fault detection method for modular multilevel converter semiconductor power switches, Article IET Power Electronics ; Volume 9, Issue 2 , 2016 , Pages 165-174 ; 17554535 (ISSN) ; Khodabandeh, M ; Zolghadri, M. R ; Sharif University of Technology
Institution of Engineering and Technology 2016
This study proposes a new fault detection method for modular multilevel converter (MMC) semiconductor power switches. While in common MMCs, the cells capacitor voltages are measured directly for control purposes, in this study voltage measurement point changes to the cell output terminal improving fault diagnosis ability. Based on this measurement reconfiguration, a novel fault detection algorithm is designed for MMCs semiconductor power switches. The open circuit and short circuit faults are detected based on unconformity between modules output voltage and switching signals. Simulation and experimental results confirm accurate and fast operation of the proposed method in faulty cell...
Improvement of fault detection in wireless sensor networks, Article 2009 Second ISECS International Colloquium on Computing, Communication, Control, and Management, CCCM 2009, Sanya, 8 August 2009 through 9 August 2009 ; Volume 4 , 2009 , Pages 644-646 ; 9781424442461 (ISBN) ; Barati, A ; Movaghar, A ; Yangzhou University; Guangdong University of Business Studies; Wuhan Institute of Technology; IEEE SMC TC on Education Technology and Training; IEEE Technology Management Council ; Sharif University of Technology
This paper presents a centralized fault detection algorithm for wireless sensor networks. Faulty sensor nodes are identified based on comparisons between neighboring nodes and own central node and dissemination of the decision made at each node. RNS system is used to tolerate transient faults in sensing and communication. In this system, arithmetic operations act on residues - reminder of dividing original number in several definite modules - in parallel. Consequently computations on these residues which are smaller than the original number are performed, so speed up arithmetic and decreased power consumption is achieved. ©2009 IEEE