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    Efficient parallel routing algorithms for cartesian and composition networks

    , Article 13th International Computer Society of Iran Computer Conference on Advances in Computer Science and Engineering, CSICC 2008, Kish Island, 9 March 2008 through 11 March 2008 ; Volume 6 CCIS , 2008 , Pages 299-307 ; 18650929 (ISSN); 3540899847 (ISBN); 9783540899846 (ISBN) Bakhshi, M ; Bakhshi, S ; Sarbazi Azad, H ; Sharif University of Technology
    2008
    Abstract
    The Cartesian and Composition products are two well known graph products, also applied to interconnection networks area. The Cartesian and Composition network products possess great characteristics of fault resilience according to their high connectivity. In this paper, we study the existence and construction of parallel routing paths in these two well-known product networks. To prove the existence of certain number of parallel paths in these product networks, we need to compute their connectivity. By assuming the availability of certain number of faulty nodes, we propose some new shortest-path parallel routing algorithms. These algorithms can be used both in faulty networks and to route... 

    A reconfigurable fault-tolerant routing algorithm to optimize the network-on-chip performance and latency in presence of intermittent and permanent faults

    , Article Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors ; 2011 , Pages 433-434 ; 10636404 (ISSN) ; 9781457719523 (ISBN) Jabbarvand Behrouz, R ; Modarressi, M ; Sarbazi Azad, H ; Sharif University of Technology
    Abstract
    As the semiconductor industry advances to the deep sub-micron and nano technology points, the on-chip components are more prone to the defects during manufacturing and faults during system operation. Consequently, fault tolerant techniques are essential to improve the yield of modern complex chips. We propose a fault-tolerant routing algorithm that keeps the negative effect of faulty components on the NoC power and performance as low as possible. Targeting intermittent faults, we achieve fault tolerance by employing a simple and fast mechanism composed of two processes: NoC monitoring and route adaption. Experimental results show the effectiveness of the proposed technique, in that it offers... 

    LTR: A low-overhead and reliable routing for network on chips

    , Article 2008 International SoC Design Conference, ISOCC 2008, Busan, 24 November 2008 through 25 November 2008 ; Volume 1 , Volume 1 , 2008 , Pages 129-133 ; 9781424425990 (ISBN) Patooghy, A ; Miremadi, S. G ; Sharif University of Technology
    IEEE Computer Society  2008
    Abstract
    A fault tolerant routing algorithm is presented in this paper. proposed routing algorithm is based on making a redundant of each packet as well as sending the redundant packets the paths with low traffic loads. Since two copies of each reach the destination node, the erroneous packets are and replaced with the correct ones. To effectively use paths with lower traffic loads, the redundant packets are according to YX routing while the original packets are according to Duato's routing algorithm. Minimizing the of sent redundant packets and exploiting different paths sending the original and redundant packets enable the algorithm to improve the reliability of NoCs with power and performance... 

    Design and Implementation of a Fault-Tolerant Routing Algorithm in WSNs

    , M.Sc. Thesis Sharif University of Technology Hezaveh, Maryam (Author) ; Miremadi, Ghasem (Supervisor)
    Abstract
    Wireless Sensor Networks (WSNs) are prone to faults due to battery depletion of nodes, where a node failure can disturb routing, as it plays a key role in transferring sensed data to the end users. A WSN may be partitioned into groups of nodes called clusters; for every cluster, there is a node, called Cluster Head (CH) that is responsible for collecting and transferring data from all nodes in that cluster. This means that the CH is a single point of failure; i.e., once a CH fails, the whole cluster will fail, which leads to inability of its members for transferring data outside the cluster. This thesis presents a Fault-Tolerant and Energy-Aware algorithm (FTEA), which prolongs the lifetime... 

    Directed flooding: A fault-tolerant routing protocol for wireless sensor networks

    , Article Systems Communications 2005, Montreal, 14 August 2005 through 17 August 2005 ; Volume 2005 , 2005 , Pages 395-400 Farivar, R ; Fazeli, M ; Miremadi, S. G ; Sharif University of Technology
    2005
    Abstract
    Wireless sensor networks consist of small nodes with sensing, computation, and wireless communicationr capabilities. Many routing protocols have been specifically designed for WSNs where energy awareness is an essential design issue. Routing protocols in WSNs might differ depending on the application and network architecture. In this article, a fault-tolerant and energy efficient routing protocol for wireless sensor networks is proposed This protocol is called Directed Flooding, and is a descendant of the Flooding routing protocol, which consumes less energy, while maintaining high levels of fault-tolerance. This is done by Tending data in a specific aperture instead of broadcasting, which... 

    A novel test strategy and fault-tolerant routing algorithm for NoC routers

    , Article Proceedings - 17th CSI International Symposium on Computer Architecture and Digital Systems ; 2013 , Pages 133-136 ; 9781479905621 (ISBN) Alamian, S. S ; Fallahzadeh, R ; Hessabi, S ; Alirezaie, J ; Computer Society of Iran; IPM ; Sharif University of Technology
    IEEE Computer Society  2013
    Abstract
    In this paper, we present a novel routing algorithm in order to avoid deadlock and packet dropping. In our proposed algorithm the network-on-chip (NoC) is capable of tolerating faults in presence of control faults in combinational parts of routers. In addition, by modifying the functionality of the router, the router is enabled to test its own, as well as the preceding router's functionality based on the routing algorithm, destination address and previous router's situation. Each router recognizes the faulty neighbor and announces it to successive routers. In this scheme no extra packets will be generated. We analyze the effects of our method on latency, power consumption and drop rate. Our... 

    A new deterministic fault tolerant wormhole routing strategy for k-ary 2-cubes

    , Article 2010 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2010, 28 December 2010 through 29 December 2010 ; 2010 , Pages 14-20 ; 9781424459674 (ISBN) Borhani, A. H ; Movaghar, A ; Cole, R. G ; Sharif University of Technology
    Abstract
    Multicomputers have experienced a rapid development during the last decade. Multicomputers rely on an interconnection network among processors to support the message-passing mechanism. Therefore, the reliability of the interconnection network is very important for the reliability of the whole system. In this paper a new fault-tolerant routing algorithm, which is based on dimension order routing, is proposed for k-ary 2-cubes. Packets are sent to their destination through XY routing algorithm and if this transmission is not possible, YX routing algorithm is applied. The XY routing algorithm nullifies offset in "X" direction before routing in "Y" direction, but the YX routing algorithm first... 

    Fault Tolerant Routing in Wireless Network on Chip

    , Ph.D. Dissertation Sharif University of Technology Tavakoli, Ehsan (Author) ; Tabandeh, Mahmoud (Supervisor) ; Raahemi, Bijan (Co-Advisor)
    Abstract
    Network-on-Chip (NoC) as a promising design approach for on-chip interconnect fabrics could overcome the energy as well as synchronization challenges of the conventional interconnects in the gigascale System-on-Chips (SoC). The advantage of communication performance of traditional wired NoC will no longer be continued by the future technology scaling. Packets that travel between distant nodes of a large scale wired on-chip network significantly suffer from energy dissipation and latency due to the routing overhead at each hop. According to the ITRS annual report, the RFCMOS characteristics will be steadily improved by technology scaling. As the operating frequency of RF devices increases,... 

    A fault-tolerant and energy-aware mechanism for cluster-based routing algorithm of WSNs

    , Article Proceedings of the 2015 IFIP/IEEE International Symposium on Integrated Network Management, IM 2015, 11 May 2015 through 15 May 2015 ; May , 2015 , Pages 659-664 ; 9783901882760 (ISBN) Hezaveh, M ; Shirmohammdi, Z ; Rohbani, N ; Miremadi, S. G ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    Wireless Sensor Networks (WSNs) are prone to faults due to battery depletion of nodes. A node failure can disturb routing as it plays a key role in transferring sensed data to the end users. This paper presents a Fault-Tolerant and Energy-Aware Mechanism (FTEAM), which prolongs the lifetime of WSNs. This mechanism can be applied to cluster-based WSN protocols. The main idea behind the FTEAM is to identify overlapped nodes and configure the most powerful ones to the sleep mode to save their energy for the purpose of replacing a failed Cluster Head (CH) with them. FTEAM not only provides fault tolerant sensor nodes, but also tackles the problem of emerging dead area in the network. Our... 

    XYX: a power & performance efficient fault-tolerant routing algorithm for network on chip

    , Article Proceedings of the 17th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2009, 18 February 2009 through 20 February 2009, Weimar ; 2009 , Pages 245-251 ; 9780769535449 (ISBN) Patooghy, A ; Miremadi, G ; Sharif University of Technology
    2009
    Abstract
    Reliability is one of the main concerns in the design of network on chips due to the use of deep-sub micron technologies in fabrication of such products. This paper proposes a fault-tolerant routing algorithm called XYX which is based on sending redundant packets through the paths with lower traffic loads. The XYX routing algorithm makes a redundant copy of each packet at the source node and exploits two different routing algorithms to route the original and the redundant packets. Since two copies of each packet reach the destination node, the erroneous packet is detected and replaced with the correct one. Due to the use of paths with lower traffic rates for sending redundant packets and... 

    Fault-tolerance improvement of planar adaptive routing based on detailed traffic analysis

    , Article 22nd International Symposium on Computer and Information Sciences, ISCIS 2007, Ankara, 7 November 2007 through 9 November 2007 ; 2007 , Pages 408-412 ; 1424413648 (ISBN); 9781424413645 (ISBN) Shamaei, A ; Nayebi, A ; Sarbazi Azad, H ; Sharif University of Technology
    2007
    Abstract
    Currently, some coarse measures like global network latency are used to compare routing protocols. These measures do not provide enough insight of traffic distribution among network nodes in the presence of different fault regions. This paper presents a detailed traffic analysis of fault-tolerant planar adaptive routing (FTPAR) algorithm achieved by an especially developed tool. Per-node traffic analysis illustrates the traffic hotspots caused by fault regions and provides a great assistance in developing fault tolerant routing algorithms. Based on such detailed information, a simple yet effective improvement of FTPAR is suggested. Moreover, the effect of a traffic hotspot on the traffic of...