Sharif Digital Repository

Gain-boosted cascode amplifiers are good choices for power optimiied high-speed amplifiers. In this paper, after a comprehensive study on the pole-zero locus and time response, a generic and perfect model is developed for these amplifiers. By the help of this novel modeling method, the optimum parameters for the feedback or auxiliary amplifier are determined, in order to eliminate the well-known slow timing component in the step response and obtain the minimum achievable senling time. The required circuit conditions as well as a straightforward design procedure for realizing the results of the analytic analysis are presented, finally. © 2003 IEEE  

Design techniques to enhance bandwidth and linearity of broadband multistage low-noise amplifiers (LNAs) are presented. A feedback amplifier circuit is proposed to compensate for transistor gain roll-off with frequency in other amplifier stages and extend overall bandwidth. Moreover, a transistor width tapering in a multistage LNA is applied to improve linearity. These techniques are adopted in a three-stage monolithic microwave integrated circuit (MMIC) LNA implemented in a 0.1-μm GaAs pHEMT process. The LNA features 18-43 GHz bandwidth, 21.6 dB average gain, and 1.8-2.7 noise figure (NF). It exhibits output 1-dB compression point of 11.5 dBm at 30 GHz and consumes 70 mA bias current from a... 

A dual-band neutralization technique based on the transformer feedback between the drain and the gate of a transistor is presented. The drain and gate bias lines of the transistor are realized as multiorder LC networks. Transformer coupling between the inductors of the two networks can be used to concurrently neutralize the gate-drain capacitance of the transistor at multiple frequencies. Moreover, these frequencies can be placed close together to achieve wideband neutralization. A proof-of-concept dual-band 27/33-GHz amplifier is designed and implemented in a 0.1-μm GaAs pseudomorphic high-electron mobility transistor process. The maximum gain of the transistor at the two frequency bands is... 

A method to design a tunable low noise amplifier (LNA) for multiband receivers is proposed. This paper also presents a single-ended to differential conversion (S2DC) topology which improves the LNA linearity without degrading its noise performance. Combining input tuning with S2DC in a single stage reduces power consumption of the LNA and decreases effects of supply noise. An LNA has been designed based on the proposed method for 2.3-4.8 GHz in a 0.18 μm CMOS technology. Simulations show an IIP3 of -3.2 dBm, a less than 3.7 dB noise figure (NF), a voltage gain of 24 dB in the whole frequency range. The LNA draws 13.1 mW from a 1.8 V supply. The results indicate that the proposed tuning... 

This paper presents a bandwidth enhancement technique for broadband Darlington amplifiers. A detailed analysis of the high-frequency performance of the Darlington amplifier and the effect of bandwidth enhancement is provided. A design procedure is also given for broadband feedback Darlington amplifiers with bandwidth enhancement and gain flattening. A single- and a three-stage feedback amplifier with the proposed improvements are designed and implemented in a 0.25-μm Al-GaAs-InGaAs pHEMT technology. The single-stage amplifier provides 6 ± 0.4 dB of small-signal gain in the frequency band of 1-30 GHz. The three-stage amplifier features 17.8 ± 0.8 dB of small-signal gain in the frequency band... 

The transformer-feedback (TRFB) interstage bandwidth enhancement technique for broadband multistage amplifiers is presented. Theory of the TRFB bandwidth enhancement and the design conditions for maximum bandwidth, maximally flat gain, and maximally flat group delay are provided. It is shown that the TRFB bandwidth enhancement can provide higher bandwidth compared to the conventional techniques based on reactive impedance matching networks. A three-stage low-noise amplifier (LNA) monolithic microwave integrated circuit with the TRFB between its consecutive stages is designed and implemented in a 0.1-μ m GaAs pHEMT process. The TRFB is realized by coupling between the drain bias lines of... 

An analytical approach for design optimization of multi-stage LNAs with common source topology is developed. This paper reviews and analyses simultaneous noise and input impedance matching in three different topologies including common source amplifier with inductive degeneration, resistive feedback and dual feedback in order to achieve maximum available gain and minimum possible noise figure (NF). A study on multi-stage LNAs is performed to calculate optimum input impedance of each stage for minimum overall NF while considering the gain and NF of that stage in addition to the effect of noise of the following stages. MATLAB was used to calculate the starting point of design optimization in a...