Sharif Digital Repository

On-chip accurate clock references are one of the essential building blocks in fully integrated Systems-On-Chips (SOC). In this paper, a low phase noise, temperature and supply voltage independent clock reference is presented. It provides the reference frequency for a biomedical implantable system. The simulated phase noise at 100 KHz offset from 2MHz carrier is 113dBc/Hz. Simulations show the frequency remains within 0.34% of the nominal oscillation frequency in the operating voltage range of 1.7 - 1.9 V without any calibration and its change in the temperature range of 20-to100C is 0.5%. The circuit consumes 77W and is designed in a 0.18m technology with 1.8V supply voltage  

An X-band core chip is designed and fabricated in 0.18-μm CMOS technology, which can significantly reduce the monolithic microwave integrated circuit count required for realizing an active beam-former T/R module. The core chip consists of two RX/TX paths, each of which includes a 6-b phase shifter, a 6-b attenuator, along with two input and output amplifiers. A new architecture for realizing such a core chip system and a low loss circuit for 5.625° phase shift block are proposed. The overall rms phase and gain errors are better than 2° and 0.25 dB, respectively, in both RX/TX paths. The gain of each path is around 12 dB, while the output 1-dB compression point is higher than 10 dBm over the... 

In this paper, a fully integrated 30-dBm UHF band differential power amplifier (PA) with transformer-type combiner is designed and fabricated in a 0.18-μm CMOS technology. For the high power PA design, proposed transformer network and the number of power cells is fully analyzed and optimized to find inductors dimensions. In order to improve both the linear operating range and the power efficiency simultaneously, a parallel combination of the class AB and the class C amplifier in power cells was employed. The PA delivers an output power of 29 dBm and a power-added efficiency of 24% with a power gain of 20 dB, including the losses of the bond-wires  

In this brief, a transformer-type power combiner for a fully integrated high-power CMOS power amplifier (PA) is presented. The proposed power combiner is composed of a number of transformers that, unlike the ones in conventional approaches, have different sizes. This leads to higher efficiency and smaller chip area. After considering several power stage topologies, analysis and optimization of the transformer network (the power combiner) are presented. To demonstrate the advantages of the proposed architecture, a 900-MHz CMOS PA with the proposed power combiner was implemented with a 0.18-μm radio-frequency CMOS process. The amplifier achieved an efficiency value of 24% at the maximum output... 

The unique properties of modified Hermite pulses is utilized to develop a novel pulse technique for Ultra Wideband (UWB) communications. The proposed method increases the bandwidth of the pulse up to 10 GHz and overcomes the coexistence problem of UWB and vulnerable narrowband systems through suppressing narrowband interference. Consequently it improves the range of UWB communications by increasing the power, without disturbing the narrowband systems. The pulse technique is implemented in high frequency pulse generation circuits and could be fully integrated in BiCMOS process. The nulls of the frequency response are tuned to be located in a definite narrowband system with the number of the...