Sharif Digital Repository

Compile-time optimizations play an important role in the efficient design of real-time embedded systems. Usually, compile-time optimizations are designed to reduce average-case execution time (ACET). While ACET is a main concern in high-performance computing systems, in real-time embedded systems, concerns are different and worst-case execution time (WCET) is much more important than ACET. Therefore, WCET reduction is more desirable than ACET reduction in many real-time embedded systems. In this article, we propose a compile-time optimization method aimed at reducing WCET in real-time embedded systems. In the proposed method, based on the predicated execution capability of embedded... 

Although the read disturb STT-RAM approximation technique improves performance, it consists of an approximate read plus an approximate write both at the same time. So it may degrade the application Quality of Result (QoR) considerably. On the other hand, the incorrect read decision approximation technique improves power without corrupting the stored data. We adopt an opportunity study for instruction-based distinction of read implementation to take advantage of both of the approximation techniques, while enhancing application’s QoR. We evaluated the proposed method using a set of state of the art benchmarks. The experimental results show that our method allows to increase application’s QoR... 

The flexibility of software-based fault tolerant approaches in providing the required level of reliability Commer-cial-Off-The Shelf (COTS) devices made them the first choice in designing safety-critical systems. In this paper, we propose a reliability improvement method for COTS-based systems, so-called, RI-COTS. The main idea behind RI-COTS is to establish a tradeoff between reliability and performance of COTS system through controlling redundant execution at instruction level. RI-COTS is implemented on LEON2 processor VHDL model. Our simulation results show that comparing with the most related studies, RI-COTS can improve the fault detection capability by 20% with only 4% performance... 

Although the read disturb spin-transfer torque RAM approximation technique improves performance, it may consist of an approximate read plus an approximate write both at the same time. So it may degrade the application quality of result (QoR) considerably. On the other hand, the incorrect read decision approximation technique improves power without corrupting the stored data. We adopt an opportunity study for instruction-based distinction of read implementation to take advantage of both of the approximation techniques, while enhancing application's QoR. We evaluated the proposed method using a set of state-of-the-art benchmarks. The experimental results show that our method allows to increase... 

Estimating the energy consumption of applications is a key aspect in optimizing embedded systems energy consumption. This paper proposes a simple yet accurate instruction-level energy estimation model for embedded systems. As a case study, the model parameters were determined for a commonly used ARM7TDMI-based microcontroller. The total energy includes the energy consumption of the processor core, Flash memory, memory controller, and SRAM. The model parameters are instructions opcode, number of shift operations, register bank bit flips, instructions weight and their Hamming distance, and different types of memory accesses. Also, the effect of pipeline stalls have been considered. In order to...