Sharif Digital Repository

In this paper, different models of gain enhanced amplifier are compared and the most accurate one is chosen. Based on this model, complete symbolic small signal analysis is performed and a design procedure leading to high speed gain boosted amplifier is presented  

In this brief, a design technique for tapered distributed low-noise amplifiers (LNAs) is presented. A circuit model is developed for gain and noise analysis of a nonuniform distributed amplifier (DA). It is shown that by optimal tapering of gate and drain transmission lines and transistors, the tapered distributed LNA can provide lower broadband average noise figure (NF) compared to a uniform DA. A proof-of-concept integrated circuit is implemented using a 0.1-μm GaAs pHEMT process. The amplifier provides average gain of 15.2 dB and 3-dB bandwidth of 43.3 GHz. The average NF of 2.3 dB and minimum NF of 2.0 dB are achieved over 2–40 GHz. The chip consumes 55 mA current from a 2-V supply. IEEE... 

A high-power short-pulse generator based on the diode step recovery phenomenon and high repetition rate discharges in a two-electrode gas discharge tube is presented. The proposed circuit is simple and low cost and driven by a low-power source. A full analysis of this generator is presented which, considering the nonlinear behavior of the gas tube, predicts the waveform of the output pulse. The proposed method has been shown to work properly by implementation of a kW-range prototype. Experimental measurements of the output pulse characteristics showed a rise time of 3.5 ns, with pulse repetition rate of 2.3 kHz for a 47-Ω load. The input peak power was 2.4 W, which translated to about... 

In this brief, a design technique for tapered distributed low-noise amplifiers (LNAs) is presented. A circuit model is developed for gain and noise analysis of a nonuniform distributed amplifier (DA). It is shown that by optimal tapering of gate and drain transmission lines and transistors, the tapered distributed LNA can provide lower broadband average noise figure (NF) compared to a uniform DA. A proof-of-concept integrated circuit is implemented using a 0.1-μm GaAs pHEMT process. The amplifier provides average gain of 15.2 dB and 3-dB bandwidth of 43.3 GHz. The average NF of 2.3 dB and minimum NF of 2.0 dB are achieved over 2-40 GHz. The chip consumes 55 mA current from a 2-V supply. ©... 

Electricity companies have been under a great pressure to improve their technical and financial performances in order to survive and thrive in the deregulated environment. Therefore, these companies are seeking for innovative approaches to take the most out of the restricted resources. These approaches inherently concentrate the available budgets to the most critical components. In this regard, prioritizing the system components and identifying the most critical ones play a vital role in the planning and operation of the system. This paper presents a novel approach to prioritize power transmission system components. In the proposed methodology, a criticality factor is defined and implemented... 

Medium power distributed energy resources (DERs) are commonly connected to medium voltage distribution systems via voltage source converters (VSCs). Several guidelines and standards have been developed to establish the needed criteria and requirements for DERs interconnections. In this respect, it is preferred to reinforce the VSC fault ride through (FRT) capability, which considerably minimizes the DG outage period and reconnection time and results in a resilient system against short circuits. Considering the significant number of asymmetrical faults in distribution systems, the VSC response in such conditions must be investigated, and consequently, its FRT capability must be reinforced. In... 

Compared with flat linear structures, tubular linear machines do not face edge effects, making their performance better than their flat counterparts. In this article, a novel linear variable-reluctance resolver with tubular configuration is proposed. To optimize the design of an electromagnetic structure, modeling methods are used. Thus, in this article, an analytical model for the proposed resolver is presented. This model is based on the magnetic equivalent circuit (MEC) method and is considerably less time-consuming than finite element analysis (FEA), yet provides accurate results. A conformal mapping is employed to compute the permeance of the air-gap. The proposed model is then utilized... 

A switched capacitor circuit frequently appears in literature in form of sample and hold or master-slave sampling filter. We call this block Sample and Hold Master-Slave Sampling Filter (SH-MSSF). Considering the time varying nature of this circuit it is difficult to predict its behavior, though it looks like a very simple circuit. So there exists no formula describing its function in all of its applications. In this brief, we present a closed-form transfer function, explaining the operation of SH-MSSF, based on state-space analysis. Then by interpolating an infinite number of such transfer functions a continuous-time formula is derived that can exactly model the behavior of this (Linear... 

This letter deals with a novel variant of antithetic integral feedback controller (AIFC) motifs which can feature robust perfect adaptation, a pervasive (desired) ability in natural (synthetic) biomolecular circuits, when coupled with a wide class of process networks to be regulated. Using the separation of time-scales in the proposed kind of AIFC, here we find a reduced-order controller that captures the governing slow part of the original solutions under suitable assumptions. Inspired by Rössler systems, we then make use of such a simpler controller to show that the antithetic circuit can exhibit chaotic behaviors with strange attractors, where the bifurcation from a homeostatic state to... 

This paper proposes a novel FPGA-based matrix-inversion technique that is specifically tailored and optimized for real-time electromagnetic transients simulation of power electronic converters with high switching frequency. This is the first reported solution that is capable of solving the real-time equations related to using ideal switch model and the associated circuitry in very small time-steps (e.g., an average of 36 ns in a three-phase back-to-back converter case study), without requiring large amount of memory, being limited to small number of switches, adding parasitic elements, or depending on a priori knowledge of the circuit operation or switching strategy. The accuracy of the...