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    A model reduction based approach for extracting the diffusion and generation terms of pn junction leakage current

    , Article Semiconductor Science and Technology ; Volume 18, Issue 4 , 2003 , Pages 234-240 ; 02681242 (ISSN) Khalili Amiri, P ; Fathololoumi, S ; Rashidian, B ; Sharif University of Technology
    2003
    Abstract
    Using a model reduction method, a formula for the ideality factor of a pn junction as a function of the diffusion and generation terms of its reverse current is derived. Using this formula a method for separate computation of these two currents for a pn junction is presented. The validity of the method is investigated using computer simulations for an assumed diode with known ideality factor and total leakage current. Experimental results for two commercially available diodes validate the proposed technique  

    Leak-Gauge: A late-mode variability-aware leakage power estimation framework

    , Article Microprocessors and Microsystems ; Volume 37, Issue 8 PARTA , 2013 , Pages 801-810 ; 01419331 (ISSN) Assare, O ; Momtazpour, M ; Goudarzi, M ; Sharif University of Technology
    2013
    Abstract
    Leakage power has already become the major contributor to the total on-chip power consumption, rendering its estimation a necessary step in the IC design flow. The problem is further exacerbated with the increasing uncertainty in the manufacturing process known as process variability. We develop a method to estimate the variation of leakage power in the presence of both intra-die and inter-die process variability. Various complicating issues of leakage prediction such as spatial correlation of process parameters, the effect of different input states of gates on the leakage, and DIBL and stack effects are taken into account while we model the simultaneous variability of the two most critical... 

    New configuration memory cells for FPGA in nano-scaled CMOS technology

    , Article Microelectronics Journal ; Volume 42, Issue 11 , 2011 , Pages 1187-1207 ; 00262692 (ISSN) Azizi Mazreah, A ; Manzuri Shalmani, M. T ; Sharif University of Technology
    2011
    Abstract
    In nano-scaled CMOS technology, the reduction of soft error rate and leakage current are the most important challenges in designing Field Programmable Gate Arrays (FPGA). To overcome these challenges, based on the observations that most configuration bit-streams of FPGA are zeros across different designs and that configuration memory cells are not directly involved with signal propagation delays in FPGA, this paper presents three new low-leakage and hardened configuration memory cells for nano-scaled CMOS technology. These cells are completely hardened when zeros are stored in the cells and cannot flip from particle strikes at the sensitive cell nodes. These cells retain their data with... 

    Fine-grained SnO2 varistors prepared by microwave sintering for ultra-high voltage applications

    , Article Materials Letters ; Volume 230 , 2018 , Pages 9-11 ; 0167577X (ISSN) Maleki Shahraki, M ; Mahmoudi, P ; Abdollahi, M ; Ebadzadeh, T ; Sharif University of Technology
    Elsevier B.V  2018
    Abstract
    In this research, fine-grained SnO2-based varistors with a simple microstructure and the mean grain size of 0.8 µm were obtained by the microwave sintering method. The breakdown electric field measured for these varistors was 12 kV/cm that is 3 times higher than the conventional-sintered varistors. The high nonlinear coefficient (60) and low leakage current density (9 µA/cm2) were achieved in fine-grained SnO2 varistors. The fine-grained SnO2 varistors appropriately clamped pulse current surges and the calculated value of the clamping voltage ratio of these varistors was 2. The excellent electrical properties and protective effect of fine-grained SnO2 varistors showed that these varistors... 

    Microstructural developments and electrical properties of novel coarse-grained SnO2 varistors obtained by CuO addition for low-voltage applications

    , Article Ceramics International ; Volume 44, Issue 15 , 2018 , Pages 18478-18483 ; 02728842 (ISSN) Maleki Shahraki, M ; Mahmoudi, P ; Golmohammad, M ; Delshad Chermahini, M ; Sharif University of Technology
    Elsevier Ltd  2018
    Abstract
    This research focused on making novel low-voltage SnO2 varistors by CuO addition on conventional high-voltage SnO2 varistors. Moreover, the withstand surge capability of samples was studied. The results showed that CuO addition enhances grain growth of SnO2 and coarse-grained SnO2 varistors with simple microstructures were acquired in 1 mol% CuO-doped sample. This coarse-grained SnO2 varistor presented a high nonlinear coefficient (23) and low leakage current density (23 µA/cm2) with low breakdown field value of 0.6 kV/cm. Despite the large grain size, the low residual voltage ratio (2.3) was obtained for this sample compared to the CuO-free sample. The decrease in grain electric resistivity... 

    Comparison of common-mode voltage in three-phase quasi-Z-source inverters using different shoot-through implementation methods

    , Article Proceedings - 2018 IEEE 12th International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018 ; 4 June , 2018 , Pages 1-6 ; 9781538625088 (ISBN) Noroozi, N ; Zolghadri, M. R ; Yaghoubi, M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2018
    Abstract
    In Z-source family inverters, shoot-through (ST) states are applied as a part of passive state in each switching cycle. The distribution of ST intervals along a switching period affects the system parameters as total harmonic distortion (THD), switching loss and common-mode voltage (CMV). In this paper, ST methods in a three-phase quasi-Z-source inverter (q-ZSI) are compared due to the CMV level. High-frequency harmonics of CMV cause leakage current flow in a transformerless grid-connected photovoltaic (PV) system. Through the comparison of the ST methods, the method with minimum CMV is identified. The experimental results are Prasented for a low voltage q-ZSI prototype. © 2018 IEEE  

    Low-leakage soft error tolerant port-less configuration memory cells for FPGAs

    , Article Integration, the VLSI Journal ; Volume 46, Issue 4 , September , 2013 , Pages 413-426 ; 01679260 (ISSN) Azizi Mazreah, A ; Manzuri Shalmani, M. T ; Sharif University of Technology
    2013
    Abstract
    As technology scales the area constraint is becoming less restrictive, but soft error rate and leakage current are drastically increased with technology down scaling. Therefore, in nano-scaled CMOS technology, the reduction of soft error rate and leakage current is the most important challenge in designing field programmable gate arrays (FPGA). To overcome these difficulties, based on the observations that most configuration bit-streams of FPGA are zeros across different designs and that configuration memory cells are not directly involved with signal propagation delays in FPGA, this paper presents a new family of configuration memory cells for FPGAs in nano-scaled CMOS technology. When... 

    A modulation method for leakage current reduction in a three-phase grid-tie quasi-Z-source inverter

    , Article IEEE Transactions on Power Electronics ; 2018 ; 08858993 (ISSN) Noroozi, N ; Yaghoubi, M ; Zolghadri, M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2018
    Abstract
    The leakage current originated from the fluctuations of the common-mode voltage (CMV) is an issue in a transformerless grid-connected photovoltaic (PV) system. In this paper, a modified space vector modulation based on the Fourier transform analysis is proposed to reduce the leakage current in a three-phase quasi-Z-source inverter (qZSI). The CMV harmonic content in a qZSI contains low and high-frequency harmonics which cause safety and EMI problems respectively. By implementing the proposed modulation in a three-phase qZSI, the low-frequency harmonics of the CMV are mainly reduced. The distribution of the high-frequency harmonics is also modified in a way they can be simply filtered.... 

    A modulation method for leakage current reduction in a three-phase grid-tie quasi-z-source inverter

    , Article IEEE Transactions on Power Electronics ; Volume 34, Issue 6 , 2019 , Pages 5439-5450 ; 08858993 (ISSN) Noroozi, N ; Yaghoubi, M ; Zolghadri, M. R ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2019
    Abstract
    The leakage current originated from the fluctuations of the common-mode voltage (CMV) is an issue in a transformerless grid-connected photovoltaic system. In this paper, a modified space vector modulation based on the Fourier transform analysis is proposed to reduce the leakage current in a three-phase quasi-Z-source inverter (qZSI). The CMV harmonic content in a qZSI contains low-and high-frequency harmonics that cause safety and electromagnetic interference problems, respectively. By implementing the proposed modulation in a three-phase qZSI, the low-frequency harmonics of the CMV are mainly reduced. The distribution of the high-frequency harmonics is also modified in a way they can be... 

    Design and Implementation of Transformerless Grid Connected PV Inverter with Mitigating Leakage Currents

    , M.Sc. Thesis Sharif University of Technology Amereh, Mohammad (Author) ; Zolghadri, Mohammad Reza (Supervisor)
    Abstract
    In recent years Photovoltaic Panels (PV) are very wide spread. Due to AC working mode of many consumers produce DC voltage of PV must be converted to AC voltage by inverters. Nowdays one of the most popular inverter topologies are grid connected transformerless inverters. The main task of transformer is galvanic isolation of PV from grid. These transformers are commonly work with grid frequency i.e 50 Hz, and consequently are bulky, heavy and expensive. Transformer elimination results in common mode leakage current from parasitic capacitors of PV cells and its grounded frame to the grid ground, that will cause in EMI and malfunction of earth fault relays.
    In this thesis the factors of... 

    Low-leakage soft error tolerant dual-port SRAM cells for cache memory applications

    , Article Microelectronics Journal ; Volume 43, Issue 11 , November , 2012 , Pages 766-792 ; 00262692 (ISSN) Mazreah, A. A ; Manzuri Shalmani, M. T ; Sharif University of Technology
    2012
    Abstract
    As transistor dimensions are reduced due to technological advances, the area constraint is becoming less restrictive, but soft error rate, leakage current, and process variation are drastically increased. Therefore, in nano-scaled CMOS technology, soft error rate, leakage current and process variation are the most important issues in designing embedded cache memory. To overcome these challenges, and based on the observation that cache-resident memory values of ordinary programs exhibit a strong bias towards zero, this paper deals with new low leakage, hardened, and read-static-noise-margin-free SRAM memory cells for nano-scaled CMOS technology. These cells are completely hardened and cannot... 

    A nanoscale CMOS SRAM cell for high speed applications

    , Article 5th International Conference on MEMS NANO, and Smart Systems, ICMENS 2009, 28 December 2009 through 30 December 2009, Dubai ; 2010 , Pages 33-36 ; 9780769539386 (ISBN) Azizi Mazreah, A ; Manzuri Shalmani, M. T ; Mehrparvar, A ; Sharif University of Technology
    2010
    Abstract
    The leakage current and process variation are drastically increased with technology scaling. In Conventional SRAM cell due to process variations, stored data can be destroyed during read operation. Therefore, leakage current of SRAM cell and stability during read operation are two important parameters in nano-scaled CMOS technology. To overcome these limitations and to increase the speed of conventional SRAMs, we have developed a read-static-noise-margin-free SRAM cell. The developed cell has six-transistors and uses two read/write-lines and two read/write-bit-lines during read/write operation. This cell retains its data with leakage current and positive feedback without refresh cycle. The... 

    A novel nano-scaled SRAM cell

    , Article World Academy of Science, Engineering and Technology ; Volume 65 , 2010 , Pages 172-174 ; 2010376X (ISSN) Azizi Mazreah, A ; Sahebi, M. R ; Manzuri Shalmani, M. T ; Sharif University of Technology
    Abstract
    To help overcome limits to the density of conventional SRAMs and leakage current of SRAM cell in nanoscaled CMOS technology, we have developed a four-transistor SRAM cell. The newly developed CMOS four-transistor SRAM cell uses one word-line and one bit-line during read/write operation. This cell retains its data with leakage current and positive feedback without refresh cycle. The new cell size is 19% smaller than a conventional six-transistor cell using same design rules. Also the leakage current of new cell is 60% smaller than a conventional sixtransistor SRAM cell. Simulation result in 65nm CMOS technology shows new cell has correct operation during read/write operation and idle mode  

    Three-phase quasi-Z-source inverter with constant common-mode voltage for photovoltaic application

    , Article IEEE Transactions on Industrial Electronics ; 2017 ; 02780046 (ISSN) Noroozi, N ; Zolghadri, M. R ; Sharif University of Technology
    Abstract
    In trasformerless grid-connected photovoltaic (PV) systems, common-mode voltage (CMV) fluctuations cause leakage current flow through the stray capacitance of the PV panels. Shoot-through (SH) states in a quasi-Z-source inverter (q-ZSI), increase the amplitude of high order harmonics of CMV. In this paper, by using the modulation technique based on odd PWM (OPWM) and minor change in the Z network of the three-phase q-ZSI, the leakage current is blocked. No extra semiconductor element is added. By the proposed technique, CMV is kept nearly constant during switching cycles. The experimental results for CMV analysis in a 1kW prototype are presented to verify the theoretical analysis. IEEE  

    A novel modulation method for reducing common mode voltage in three-phase inverters

    , Article Conference Proceedings - 2017 17th IEEE International Conference on Environment and Electrical Engineering and 2017 1st IEEE Industrial and Commercial Power Systems Europe, EEEIC / I and CPS Europe 2017, 6 June 2017 through 9 June 2017 ; 2017 ; 9781538639160 (ISBN) Noroozi, N ; Zolghadri, M. R ; Yaghoubi, M ; Sharif University of Technology
    Abstract
    Leakage current is originated from common-mode voltage (CMV) time variations in a grid-connected photovoltaic (PV) system and results in several deficiencies. In this paper, a new method is proposed for CMV reduction in a three-phase voltage source inverter (VSI) system. The proposed method is based on space vector modulation and it utilizes only odd and zero vectors. By using the proposed method, the number of fluctuations of the CMV waveform per switching cycle is reduced; therefore, the amount of high-frequency harmonics of CMV is decreased. In addition, because of applying both active and zero vectors by the proposed method, the total harmonic distortion becomes less than most of other... 

    Reduced common-mode voltage in Z-source inverters

    , Article 8th Power Electronics, Drive Systems and Technologies Conference, PEDSTC 2017, 14 February 2017 through 16 February 2017 ; 2017 , Pages 413-418 ; 9781509057665 (ISBN) Noroozi, N ; Zolghadri, M. R ; Yaghoubi, M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2017
    Abstract
    Z-source family has been widespread in photovoltaic (PV) applications. In trasformerless grid-connected PV systems, the common mode voltage (CMV) time variations, cause the leakage current flow. This current flows through the stray capacitance of the PV panels. For a Z-Source Inverter (ZSI), the CMV would have higher high-frequency harmonics, due to the shoot through states within the switching cycles. In this paper, the CMV of a ZSI is analyzed and a simple method is proposed for the harmonic reduction of the CMV in the ZSI. The CMV reduction method is based on changing the switching states. The CMV in reduced method is compared to the CMV in the traditional ZSI in frequency domain by using... 

    Three-Phase quasi-Z-source inverter with constant common-mode voltage for photovoltaic application

    , Article IEEE Transactions on Industrial Electronics ; Volume 65, Issue 6 , 2018 , Pages 4790-4798 ; 02780046 (ISSN) Noroozi, N ; Zolghadri, M. R ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2018
    Abstract
    In trasformerless grid-connected photovoltaic (PV) systems, common-mode voltage (CMV) fluctuations cause leakage current flow through the stray capacitance of the PV panels. Shoot-through states in a quasi-Z-source inverter (q-ZSI) increase the amplitude of high-order harmonics of CMV. In this paper, by using the modulation technique based on odd pulse width modulation and minor change in the Z network of the three-phase q-ZSI, the leakage current is blocked. No extra semiconductor element is added. By the proposed technique, CMV is kept nearly constant during switching cycles. The experimental results for CMV analysis in a 1kW prototype are presented to verify the theoretical analysis. ©... 

    Harmonic analysis of common-mode voltage in quasi-z-source inverters

    , Article 2019 IEEE International Conference on Industrial Technology, ICIT 2019, 13 February 2019 through 15 February 2019 ; Volume 2019-February , 2019 , Pages 1778-1783 ; 9781538663769 (ISBN) Noroozi, N ; Yaghoubi, M ; Davoodi, A ; Ouni, S ; Zolghadri, M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2019
    Abstract
    In a transformerless grid-connected photovoltaic system, many issues arise from the leakage current flow into the ground, as EMI problems. The leakage current is originated from the common-mode voltage fluctuations. In this paper, the common-mode voltage harmonics in a three-phase quasi-Z-source inverter are analyzed using Fourier transform and a closed-loop formulation is presented for the harmonics value. The shoot-through mode in a quasi-Z-source inverter causes extra fluctuations in the common-mode voltage comparing to a classic inverter. The proposed harmonic analysis method provides a systematic way to figure out how shoot-through mode and also other parameters affect the common-mode... 

    Sequential RTV/(TiO2/SiO2) nanocomposite deposition for suppressing the leakage current in silicone rubber insulators

    , Article Applied Physics A: Materials Science and Processing ; Volume 126, Issue 5 , 2020 Parand, P ; Mohammadi, M ; Shayegani Akmal, A. A ; Samadpour, M ; dehghani, M ; Parvazian, E ; Sharif University of Technology
    Springer  2020
    Abstract
    The sequential deposition method is introduced for suppressing the leakage current in silicone rubber insulators. Room temperature vulcanizing silicone and TiO2/silica nanocomposites are sequentially deposited on silicone insulators surface. TEM results showed that TiO2 nanoparticles size is about 20–30 nm, and the structural study revealed their anatase crystalline structure. Silica nanoparticles are deposited on the surface of insulators by spray deposition. The contact angle was enhanced from 104° to 149° after nanoparticles deposition, which confirms the hydrophobicity improvement. Results show that leakage current for nanocomposite samples in a contaminated environment reduced to about... 

    Analysis and Design of a High Speed Embedded SRAM

    , M.Sc. Thesis Sharif University of Technology Rasteh, Ali (Author) ; Sharifkhani, Mohammad (Supervisor)
    Abstract
    SRAM has a very wide application in different platforms including Cache Memory in Microcontrollers, etc. also SRAM is the first candidate for memory usage in every application needing High speed or static memory circuits. SRAM Cells are constructed by Minimum size transistors in each technology node and usually the newest technology nodes are used for building SRAM blocks for accommodating maximum number of SRAM Cells in a specific area. Going through smaller technology nodes, Leakage current and Process variations problem, creates serious difficulties in designing Low Power or High speed SRAM Memories and many academic and industrial works are done wishing for improvement in SRAM power...