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    A novel high-performance and low-power mesh-based NoC

    , Article IPDPS 2008 - 22nd IEEE International Parallel and Distributed Processing Symposium, Miami, FL, 14 April 2008 through 18 April 2008 ; 2008 ; 9781424416943 (ISBN) Sabbaghi Nadooshan, R ; Modarressi, M ; Sarbazi Azad, H ; Sharif University of Technology
    2008
    Abstract
    In this paper, a 2D shuffle-exchange based mesh topology, or 2D SEM (Shuffle-exchange Mesh) for short, is presented for network-on-chips. The proposed two-dimensional topology applies the conventional well-known shuffle-exchange structure in each row and each column of the network. Compared to an equal sized mesh which is the most common topology in on-chip networks, the proposed shuffle-exchange based mesh network has smaller diameter but for an equal cost. Simulation results show that the 2D SEM effectively reduces the power consumption and improves performance metrics of the on-chip networks with regard to the conventional mesh topology. ©2008 IEEE  

    Reconfigurable cluster-based networks-on-chip for application-specific MPSoCs

    , Article Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors ; 9-11 July , 2012 , pp. 153-156 ; ISSN: 10636862 ; ISBN: 9780769547688 Modarressi, M ; Sarbazi-Azad, H ; Sharif University of Technology
    Abstract
    In this paper, we propose a reconfigurable NoC in which a customized topology for a given application can be implemented. In this NoC, the nodes are grouped into some clusters interconnected by a reconfigurable communication infrastructure. The nodes inside a cluster are connected by a fixed topology. From the traffic management perspective, this structure benefits from the interesting characteristics of the mesh topology (efficient handling of local traffic where each node communicates with its neighbors), while avoids its drawbacks (the lack of short paths between remotely located nodes). We then present a design flow that maps the frequently communicating tasks of a given application into... 

    Reconfigurable cluster-based networks-on-chip for application-specific MPSoCs

    , Article 2012 IEEE 23rd International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2012, Delft, 9 July 2012 through 11 July 2012 ; 2012 , Pages 153-156 ; 10636862 (ISSN) ; 9780769547688 (ISBN) Modarressi, M ; Sarbazi Azad, H
    2012
    Abstract
    In this paper, we propose a reconfigurable NoC in which a customized topology for a given application can be implemented. In this NoC, the nodes are grouped into some clusters interconnected by a reconfigurable communication infrastructure. The nodes inside a cluster are connected by a fixed topology. From the traffic management perspective, this structure benefits from the interesting characteristics of the mesh topology (efficient handling of local traffic where each node communicates with its neighbors), while avoids its drawbacks (the lack of short paths between remotely located nodes). We then present a design flow that maps the frequently communicating tasks of a given application into... 

    An efficient routing algorithm for irregular mesh NoCs

    , Article ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, 30 May 2010 through 2 June 2010, Paris ; 2010 , Pages 3228-3231 ; 9781424453085 (ISBN) Mahdavinia, P ; Sarbazi Azad, H ; Sharif University of Technology
    Abstract
    Many researchers favor the mesh topology as the underlying topology of the communication infrastructure of modern SoCs because of its regularity and layout efficiency. However, variability in size and shape of modules used in systems-on-chip has resulted in the use of irregular meshes for practical NoCs. In this paper, we propose a deadlock free routing algorithm for irregular mesh NoCs. Experimental results confirm that the proposed algorithm exhibits a better performance in terms of message latency and power consumption compared to other known routing algorithms for irregular mesh NoCs  

    The 2D DBM: an attractive alternative to the simple 2D mesh topology for On-Chip networks

    , Article 26th IEEE International Conference on Computer Design 2008, ICCD, Lake Tahoe, CA, 12 October 2008 through 15 October 2008 ; 2008 , Pages 486-490 ; 9781424426584 (ISBN) Sabbaghi Nadooshan, R ; Modarressi, M ; Sarbazi Azad, H ; Sharif University of Technology
    2008
    Abstract
    During the recent years, 2D mesh network-onchip has attracted much attention due to its suitability for VLSI implementation. The 2-dimensional de Bruijn topology for network-on-chip is introduced in this paper as an attractive alternative to the popular simple 2D mesh NoC. Its cost is equal to that of the simple 2D mesh but it has a logarithmic diameter. We compare the proposed network and the popular mesh network in terms of power consumption and network performance. Compared to the equal sized simple mesh NoC, the proposed de Bruijn-based network has better performance while consuming less energy. © 2008 IEEE  

    Optimal placement of frequently accessed IPs in mesh NoCs

    , Article 12th Asia-Pacific Computer Systems Architecture Conference, ACSAC 2007, Seoul, 23 August 2007 through 25 August 2007 ; Volume 4697 LNCS , 2007 , Pages 126-138 ; 03029743 (ISSN); 9783540743088 (ISBN) Moraveji, R ; Sarbazi Azad, H ; Abbaspour, M ; Sharif University of Technology
    Springer Verlag  2007
    Abstract
    In this paper, we propose the first interrelated power and latency mathematical model for the Networks-on-Chip (NoC) architecture with mesh topology. Through an analytical approach, we show the importance of tile selection in which the hot (frequently accessed) IP core is mapped. Taking into account the effect of blocking in both power and latency models, causes the estimated values to be more accurate. Simulation results confirm the reasonable accuracy of the proposed model. The major output of the model which is the average energy consumption per cycle in the whole network is the efficacious parameter that is most important and must be used by NoC designers. © Springer-Verlag Berlin... 

    The 2D SEM: A novel high-performance and low-power mesh-based topology for networks-on-chip

    , Article International Journal of Parallel, Emergent and Distributed Systems ; Vol. 25, issue. 4 , 2010 , p. 331-344 ; ISSN: 17445760 Sabbaghi-Nadooshan, R ; Modarressi, M ; Sarbazi-Azad, H ; Sharif University of Technology
    Abstract
    In this paper, a 2D shuffle-exchange based mesh topology, or 2D shuffle-exchange mesh (SEM) for short, is presented for network-on-chips. The proposed 2D topology applies the conventional well-known shuffle-exchange structure in each row and each column of the network. Compared to an equal sized mesh which is the most common topology in on-chip networks, the proposed shuffle-exchange based mesh network has smaller diameter but for an equal cost. Finally for better performance cross-shuffle is proposed. Simulation results show that the 2D SEM and 2D cross-shuffle effectively reduce the power consumption and improve performance metrics of the on-chip networks compared to the conventional mesh... 

    Performance evaluation of broadcast algorithms in all-port 2D mesh networks

    , Article 2008 International Symposium on Parallel and Distributed Processing with Applications, ISPA 2008, Sydney, NSW, 10 December 2008 through 12 December 2008 ; December , 2008 , Pages 643-648 ; 9780769534718 (ISBN) Khorramabadi, M ; Sarbazi Azad, H ; Sharif University of Technology
    2008
    Abstract
    Broadcast is among the most primitive collective communication operations of any interconnection network. Broadcast algorithms for the mesh topology have been widely reported in the literature. However, most existing algorithms have been studied in one-port and within limited conditions, such as light traffic loads. In contrast, this study simulates the broadcast operations, taking into account a wide range of traffic loads. Also, the performance evaluation of meshes in the presence of unicast and broadcast traffic is presented in this paper. To the best of our knowledge, this study is the first to consider the issue of broadcast latency at both the network and node levels. A new model for... 

    The 2D SEM: A novel high-performance and low-power mesh-based topology for networks-on-chip

    , Article International Journal of Parallel, Emergent and Distributed Systems ; Volume 25, Issue 4 , 2010 , Pages 331-344 ; 17445760 (ISSN) Sabbaghi Nadooshan, R ; Modarressi, M ; Sarbazi Azad, H ; Sharif University of Technology
    2010
    Abstract
    In this paper, a 2D shuffle-exchange based mesh topology, or 2D shuffle-exchange mesh (SEM) for short, is presented for network-on-chips. The proposed 2D topology applies the conventional well-known shuffle-exchange structure in each row and each column of the network. Compared to an equal sized mesh which is the most common topology in on-chip networks, the proposed shuffle-exchange based mesh network has smaller diameter but for an equal cost. Finally for better performance cross-shuffle is proposed. Simulation results show that the 2D SEM and 2D cross-shuffle effectively reduce the power consumption and improve performance metrics of the on-chip networks compared to the conventional mesh... 

    The shuffle-exchange mesh topology for 3D NoCs

    , Article Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN, 7 May 2008 through 9 May 2008, Sydney, NSW ; 2008 , Pages 275-280 ; 9780769531250 (ISBN) Sharifi, A ; Sabbaghi Nadooshan, R ; Sarbazi Azad, H ; Sharif University of Technology
    2008
    Abstract
    Nowadays networks-on-chip are emerging as a hot topic in IC designs with high integration. In addition to popular mesh and torus topologies, other structures can also be considered especially in 3D VLSI design. The shuffle-exchange topology is one of the popular interconnection architectures for multiprocessors due to its scalability and self-routing capability. By vertically stacking two or more silicon wafers, connected with a high-density and high-speed interconnect, it is now possible to combine multiple active device layers within a single IC. In this paper we propose an efficient three dimensional layout for a novel 2D mesh structure based on the shuffle-exchange topology. Simulation... 

    High-level modeling approach for analyzing the effects of traffic models on power and throughput in mesh-based NoCs

    , Article Proceedings of the IEEE International Frequency Control Symposium and Exposition, 4 January 2008 through 8 January 2008, Hyderabad ; 2008 , Pages 415-420 ; 0769530834 (ISBN); 9780769530833 (ISBN) Koohi, S ; Mirza Aghatabar, M ; Hessabi, S ; Pedram, M ; VLSI Society of India ; Sharif University of Technology
    2008
    Abstract
    Traffic models exert different message flows in a network and have a considerable effect on power consumption through different applications. So a good power analysis should consider traffic models. In this paper we present power and throughput models in terms of traffic rate parameters for the most popular traffic models, i.e. Uniform, Local, HotSpot and First Matrix Transpose (FMT) as a permutational traffic model. We also select Mesh topology as the most prominent NoC topology and validate the presented models by comparing our results against simulation results from Synopsys Power Compiler and Modelsim From the comparison, we show that our modeling approach leads to average error of 2%... 

    PPM - A hybrid push-pull mesh-based peer-to-peer live video streaming protocol

    , Article 2012 21st International Conference on Computer Communications and Networks, ICCCN 2012 - Proceedings 30 July 2012 through 2 August 2012 ; 2012 ; 9781467315449 (ISBN) Ghanbari, A ; Rabiee, H. R ; Khansari, M ; Salehi, M ; Sharif University of Technology
    IEEE  2012
    Abstract
    Using Peer-to-Peer (P2P) overlay networks have become a progressively popular approach for streaming live media over the Internet due to their deployment simplicity and scalability. In this paper, we propose a new hybrid push-pull live P2P video streaming protocol called PPM that combines the benefits of pull and push mechanisms for video delivery. Our main goal is to minimize the network end-to-end delay compared to the pure mesh networks. The PPM consists of two phases; Pull-based and Push-based. In the first phase, a new peer joins to the network based on a pull-based mechanism. In the second phase, a parent node based on the peers' overlay hop count in the mesh topology is selected....