Sharif Digital Repository

A new approach for the design of two-stage Miller-compensated CMOS op amps is presented. The paper studies the basic relations between power consumption, unitygain bandwidth, the biasing region, technology parameters, and the external capacitive load. As a result, simple and efficient design guides are provided to achieve the minimum possible power consumption for the given specifications and for short-channel devices. It is shown that the conventional design procedures do not always result in minimum power op amps. The presented results are also verified by Spectre simulations  

This paper presents a method for optimizing SFDR in differential active-RC filters. Simple analytical expressions for noise and third-order intermodulation (IM3) distortion in active-RC filters are derived. The nonlinear behavior of two-stage Miller-compensated op amps, which are extensively used in active-RC implementations, is also modeled. These expressions and models are used to maximize SFDR in active-RC filters by means of proper admittance scaling and optimizing the share of each op amp in the total power consumption. It is shown that both the power consumption of the filter and its area can be significantly reduced, for a given SFDR, by exploiting the presented method