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CMOS-compatible structure for voltage-mode multiple-valued logic circuits
, Article 2011 18th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2011, 11 December 2011 through 14 December 2011 ; December , 2011 , Pages 438-441 ; 9781457718458 (ISBN) ; Sharifkhani, M ; Sodagar, A. M ; Sharif University of Technology
Abstract
This paper presents a low-voltage, CMOS-compatible, voltage-mode structure for multiple-valued logic circuits. Designed based on a simple and straightforward mechanism and operating in the voltage mode, the proposed structure is suitable for low power applications. Design of both a quaternary inverter and a latch circuit based on the proposed structure are also presented. These circuits are designed in a 0.18-μm CMOS technology with a supply voltage of 1.8V, and dissipate 60nW static power for both circuits. Static noise margin of the inverter is 0.22V
Design of a Non-Bianry Analog to Digital Converterfor Impantable Neural Recording Microsystem
, M.Sc. Thesis Sharif University of Technology ; Sharifkhani, Mohammad (Supervisor) ; Sodagar, Amir Masoud (Supervisor)
Abstract
A new structure of implantable neural recording microsystem base on multiple valued logic (MVL) has been proposed. MVL is a new idea for reduction of occupied area and the power consumption of microelectronic. In another side, in implantable microsystems , occupied area and power consumption by this type of micro systems is a challenging problem in this field. Therefore, the problem of power consumption and occupied area can introduce as a prime stage of suggested microsystem completed design of convertor of analog to digital in usage of multiple level in this micro system worked. Design of convertor of analog to digital is a convertor of quaternary successive approximation. And also,...