Search for: parasitic-capacitors
Article Microelectronics Journal ; Volume 46, Issue 12 , 2015 , Pages 1275-1282 ; 00262692 (ISSN) ; Sharifkhani, M ; Sharif University of Technology
An efficient layout technique is proposed to eliminate the effect of the bottom-plate capacitors in a C-2C Digital to Analog Converter (DAC). Using this technique, the bottom-plate capacitors of 2C capacitors in the C-2C structure are placed in parallel with 1C capacitors. Then, the effect of the bottom plate capacitors is nulled by modifying the size of the main 1C capacitors. Hence, avoiding the complexity of calibration, this technique can preclude the effect of the bottom-plate to ground capacitance. Statistical simulations prove that the proposed technique is robust to non-ideal effects such as mismatch or parasitic capacitors. A 10-bit C-2C DAC is modeled in COMSOL Multiphysics using...
Article IEEE Transactions on Power Electronics ; Volume 27, Issue 4 , October , 2012 , Pages 1958-1965 ; 08858993 (ISSN) ; Fotowat Ahmady, A ; Sharif University of Technology
Boost converter operating in critical conduction mode is widely used in low-power power factor corrector because of its simplicity and low switching losses. The switching loss due to parasitic capacitor discharge at the on-time instant can also be reduced by a valley switching technique. In this paper, we introduce a new driver topology for the high-side switch in a synchronous boost converter operating in the critical conduction mode to obtain full zero-voltage switching. Using the proposed high-side driver topology, the conventional control circuit is sufficient to control the low-side switch, and no additional control circuit is required to adjust the timing of the switches. Finally, the...