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Article Proceedings - ICSEng 2011: International Conference on Systems Engineering, 16 August 2011 through 18 August 2011, Las Vegas, NV ; 2011 , Pages 352-356 ; 9780769544953 (ISBN) ; Jahanirad, H ; Attarsharghi, P ; Sharif University of Technology
Reliability analysis of combinational logic circuits using error probabilities methods, such as PTM, has been widely developed and used in literature. However, using these methods for reliability analysis of sequential logic circuits will lead to inaccurate results, because of existence of loops in their architecture. In this paper a new method is proposed based on converting the sequential circuit to a secondary combinational circuit and applying an iterative reliability analysis to the resulting configuration. Experimental results demonstrate good accuracy levels for this method
Capacity achieving linear codes with random binary sparse generating matrices over the binary symmetric channel, Article IEEE International Symposium on Information Theory - Proceedings ; 2012 , Pages 621-625 ; 9781467325790 (ISBN) ; Abadi, H. K ; Pad, P ; Saeedi, H ; Marvasti, F ; Alishahi, K ; Sharif University of Technology
In this paper, we prove the existence of capacity achieving linear codes with random binary sparse generating matrices over the Binary Symmetric Channel (BSC). The results on the existence of capacity achieving linear codes in the literature are limited to the random binary codes with equal probability generating matrix elements and sparse parity-check matrices. Moreover, the codes with sparse generating matrices reported in the literature are not proved to be capacity achieving for channels other than Binary Erasure Channel. As opposed to the existing results in the literature, which are based on optimal maximum a posteriori decoders, the proposed approach is based on a different decoder...
Article IEEE Transactions on Power Electronics ; Volume 35, Issue 8 , 2020 , Pages 7991-8001 ; Mohsenzade, S ; Hadizade, A ; Kaboli, S ; Sharif University of Technology
Institute of Electrical and Electronics Engineers Inc 2020
This article describes the development of an 18 kV, 30 kW power supply for a pulsed current load with the maximum current of 20 A and a di/dt equal to 100 A/μs. The achieved output ripple is less than 0.01%. In such a high level of precision, the most important issues are considerable difference between the instantaneous and average output powers, as well as insufficient reaction speed of the converter to the fast load change. Very low level of the voltage feedback and its sensitivity to the noise. The first issue necessitates a notable overdesign of the converter switches if the output voltage precision is dedicated to the converter. The second issue raises the problems relevant to...