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quantization-noise
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A Generic error-free AI-based encoding for FFT computation
, Article Circuits, Systems, and Signal Processing ; Volume 38, Issue 2 , 2019 , Pages 699-715 ; 0278081X (ISSN) ; Jahangir, A. H ; Sharif University of Technology
Birkhauser Boston
2019
Abstract
This paper studies the challenge of accurate FFT computation. A generic and error-free encoding is proposed based on the algebraic integers (AIs). A wise AI-based encoding may greatly decrease the error due to the non-trivial twiddle factors in the FFT computation. Further, a new method for predicting the well-pruned architecture is presented which helps designing an optimized and low-cost architecture when using the AI-based encoding. In order to examine the proposed AI-based FFT computation and also the procedure of designing an optimized architecture, a custom AI-based 16-point radix-2 2 FFT architecture has been designed and implemented using 180-nm CMOS technology. Experimental results...
A novel architecture of pseudorandom dithered MASH digital delta-sigma modulator with lower spur
, Article Journal of Circuits, Systems and Computers ; Volume 25, Issue 7 , 2016 ; 02181266 (ISSN) ; Frashidi, E ; Sadughi, S ; Sharif University of Technology
World Scientific Publishing Co. Pte Ltd
Abstract
A Digital Delta Sigma Modulator (DDSM) is a Finite State Machine (FSM); it is implemented using finite precision arithmetic units and the number of available states is finite. The DDSM always produces a periodic output signal when the input is constant. This paper proposes a novel method of applying periodic dither to a DDSM in order to obtain minimized spurious tones. The effects of adding the pseudorandom dither signal in different stages within the proposed Multi-Stage noise Shaping (MASH) modulator are expressed in the equations, and the results are compared. We present results regarding the periodicity of the quantization noise produced by a MASH modulator with a constant input and a...
A noise shaped flash time to digital converter for all digital frequency synthesizers
, Article ECCTD 2009 - European Conference on Circuit Theory and Design Conference Program, 23 August 2009 through 27 August 2009 ; 2009 , Pages 898-901 ; 9781424438969 (ISBN) ; Atarodi, M ; Sharif University of Technology
Abstract
Reduction of Time to Digital Converter (TDC) quantization related phase noise is one of the most important challenges in all digital frequency synthesizer design. In this paper, a new structure is proposed to shape the quantization noise of flash TDCs. To verify effectiveness of the proposed general noise shaping technique, it is employed on a single delay chain flash TDC. To compensate the process variation effects on the implemented circuits, a calibration technique is also proposed. The design is implemented in 0.18μm CMOS technology. Simulations show effective noise shaping of output quantization noise
Reduced complexity 1-bit high-order digital delta-sigma modulator for low-voltage fractional-N frequency synthesis applications
, Article IEE Proceedings: Circuits, Devices and Systems ; Volume 152, Issue 5 , 2005 , Pages 471-477 ; 13502409 (ISSN) ; Afzali Kusha, A ; Dehghani, R ; Mehrara, M ; Atarodi, S. M ; Nourani, M ; Sharif University of Technology
2005
Abstract
A reduced complexity third-order digital delta-sigma modulator for fractional-N frequency synthesis is presented. The high-performance modulator, which consists of two subblocks, has a single-bit output making it best for this sort of application. A good shaping of quantisation noise is achieved using a new architecture for a digital third-order delta-sigma modulator. The hardware required for this modulator is considerably less than that in previously reported leading to lower power and area consumption and a higher operating frequency. The field programmable gate array (FPGA) implementation of the whole system shows an SNR of at least 94 dB and an operating input range of 0.7 of the full...
Analysis of quantization effects on performance of hierarchical cooperation schemes in ad-hoc wireless networks
, Article Proceedings - Conference on Local Computer Networks, LCN ; 2011 , Pages 171-174 ; 9781612849287 (ISBN) ; Khalaj, B. H ; Sharif University of Technology
Abstract
In this paper, we analyze the role of the number of quantization bits on the third phase of the hierarchical cooperation scheme proposed by Ozgur et al. in 2007. The hierarchical cooperation scheme has a digital architecture and requires quantization of MIMO (Multiple-Input Multiple-Output) observations in the third phase. The choice of the number of quantization bits Q has direct effect on the pre-constant factor of the network throughput. By increasing the number of quantization bits, the MIMO capacity in the second phase increases at the expense of higher computational complexity of the third phase. We investigate such trade-off and show that there is an optimum number of quantization...
A quantization noise robust object's shape prediction algorithm
, Article 13th European Signal Processing Conference, EUSIPCO 2005, Antalya, 4 September 2005 through 8 September 2005 ; 2005 , Pages 1770-1773 ; 1604238216 (ISBN); 9781604238211 (ISBN) ; Rabiee, H. R ; Asadi, M ; Nosrati, M ; Amiri, M ; Ghanbari, M ; Sharif University of Technology
2005
Abstract
This paper introduces a quantization noise robust algorithm for object's shape prediction in a video sequence. The algorithm is based on pixel representation in the undecimated wavelet domain for tracking of the user-defined shapes contaminated by the compression noise of video sequences. In the proposed algorithm, the amplitude of coefficients in the best basis tree expansion of the undecimated wavelet packet transform is used as feature vectors (FVs). FVs robustness against quantization noise has been achieved through inherent denoising and edge component separation in the best basis selection algorithm. The algorithm uses these FVs to track the pixels of small square blocks located at the...