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    Investigating the effects of schedulability conditions on the power efficiency of task scheduling in an embedded system

    , Article ISORC 2010 - 2010 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 5 May 2010 through 6 May 2010, Carmona, Sevilla ; Volume 1 , 2010 , Pages 102-106 ; 9780769540375 (ISBN) Bashiri, M ; Miremadi, S. G ; Politecnica; IEEE ; Sharif University of Technology
    2010
    Abstract
    Power consumption, performance and reliability are the most important parameters in modern safety-critical distributed real-time embedded systems. This paper evaluates and compares different schedulability conditions in faulttolerant Rate-Monotonic (RM) and Earliest-Deadline-First (EDF) algorithms, with respect to their power efficiency. The primary-backup scheme is used to implement fault tolerance in the algorithms. To evaluate the algorithms, a software tool is developed that can simulate an embedded system consisting of n processors and m periodic tasks. The results show that depending on the different schedulability conditions, the EDF algorithm implemented with the Best-Fit policy is... 

    LEXACT: low energy n-modular redundancy using approximate computing for real-time multicore processors

    , Article IEEE Transactions on Emerging Topics in Computing ; 2017 ; 21686750 (ISSN) Baharvand, F ; Ghassem Miremadi, S ; Sharif University of Technology
    Abstract
    Multicore processors are becoming popular in safety-critical applications. A series of these applications comprises of kernels where inexact computations may produce results within the boundary of sufficient quality though, for which the reliability should stay at the maximum possible level. Intrinsic core-level redundancy in multicore processors can be leveraged to achieve the desired reliability level in form of N-modular redundancy (NMR). While NMR provides a proactive means of reliability for critical systems, it has two main drawbacks: Increase in the area and energy consumption that are both limiting factors in the embedded systems. This paper presents a software-based method to... 

    A control-theoretic energy management for fault-tolerant hard real-time systems

    , Article Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, 3 October 2010 through 6 October 2010 ; 2010 , Pages 173-178 ; 10636404 (ISSN) ; 9781424489350 (ISBN) Sharif Ahmadian, A ; Hosseingholi, M ; Ejlali, A ; Sharif University of Technology
    Abstract
    Recently, the tradeoff between low energy consumption and high fault-tolerance has attracted a lot of attention as a key issue in the design of real-time embedded systems. Dynamic Voltage Scaling (DVS) is known as one of the most effective low energy techniques for real-time systems. It has been observed that the use of control-theoretic methods can improve the effectiveness of DVS-enabled systems. In this paper, we have investigated reducing the energy consumption of fault-tolerant hard real-time systems using feedback control theory. Our proposed feedback-based DVS method makes the system capable of selecting the proper frequency and voltage settings in order to reduce the energy... 

    Two-Phase Low-Energy N-Modular Redundancy for Hard Real-Time Multi-Core Systems

    , Article IEEE Transactions on Parallel and Distributed Systems ; Volume 27, Issue 5 , 2016 , Pages 1497-1510 ; 10459219 (ISSN) Salehi, M ; Ejlali, A ; Al-Hashimi, B. M ; Sharif University of Technology
    IEEE Computer Society  2016
    Abstract
    This paper proposes an N-modular redundancy (NMR) technique with low energy-overhead for hard real-time multi-core systems. NMR is well-suited for multi-core platforms as they provide multiple processing units and low-overhead communication for voting. However, it can impose considerable energy overhead and hence its energy overhead must be controlled, which is the primary consideration of this paper. For this purpose the system operation can be divided into two phases: indispensable phase and on-demand phase. In the indispensable phase only half-plus-one copies for each task are executed. When no fault occurs during this phase, the results must be identical and hence the remaining copies... 

    High-Performance predictable NVM-based instruction memory for real-time embedded systems

    , Article IEEE Transactions on Emerging Topics in Computing ; 2018 ; 21686750 (ISSN) Bazzaz, M ; Hoseinghorban, A ; Poursafaei, F ; Ejlali, A ; Sharif University of Technology
    IEEE Computer Society  2018
    Abstract
    Worst case execution time and energy consumption are two of the most important design constraints of real-time embedded systems. Many recent studies have tried to improve the memory subsystem of embedded systems by using emerging non-volatile memories. However, accessing these memories imposes performance and energy overhead and using them as the code memory could increase the worst case execution time of the system. In this paper, a new code memory architecture for non-volatile memories is proposed which reduces the effective memory access latency by employing memory access interleaving technique. Unlike common instruction access latency improvement techniques such as prefetching and... 

    Peak-power-aware energy management for periodic real-time applications

    , Article IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ; Volume 39, Issue 4 , 2020 , Pages 779-788 Ansari, M ; Yeganeh Khaksar, A ; Safari, S ; Ejlali, A ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2020
    Abstract
    Two main objectives in designing real-time embedded systems are high reliability and low power consumption. Hardware replication (e.g., standby-sparing) can provide high reliability while keeping the power consumption under control. In this paper, we consider a standby-sparing system where the main tasks on primary cores are scheduled by our proposed peak-power-aware earliest-deadline-first policy while the backup tasks on spare cores are scheduled by our proposed peak-power-aware earliest-deadline-late policy to meet the chip thermal design power (TDP) constraint. These policies provide the best opportunity to shift the task executions as much as possible to minimize execution overlaps... 

    Offline replication and online energy management for hard real-time multicore systems

    , Article CSI Symposium on Real-Time and Embedded Systems and Technologies, RTEST 2015, 7 October 2015 through 8 October 2015 ; October , 2015 , Page(s): 1 - 7 ; 9781467380478 (ISBN) Poursafaei, F. R ; Safari, S ; Ansari, M ; Salehi, M ; Ejlali, A ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    For real-time embedded systems, energy consumption and reliability are two major design concerns. We consider the problem of minimizing the energy consumption of a set of periodic real-time applications when running on a multi-core system while satisfying given reliability targets. Multi-core platforms provide a good capability for task replication in order to achieve given reliability targets. However, careless task replication may lead to significant energy overhead. Therefore, to provide a given reliability level with a reduced energy overhead, the level of replication and also the voltage and frequency assigned to each task should be determined cautiously. The goal of this paper is to... 

    A compile-time optimization method for WCET reduction in real-time embedded systems through block formation

    , Article ACM Transactions on Architecture and Code Optimization ; Volume 12, Issue 4 , January , 2015 ; 15443566 (ISSN) Mohajjel Kafshdooz, M ; Taram, M ; Assadi, S ; Ejlali, A ; Sharif University of Technology
    Association for Computing Machinery  2015
    Abstract
    Compile-time optimizations play an important role in the efficient design of real-time embedded systems. Usually, compile-time optimizations are designed to reduce average-case execution time (ACET). While ACET is a main concern in high-performance computing systems, in real-time embedded systems, concerns are different and worst-case execution time (WCET) is much more important than ACET. Therefore, WCET reduction is more desirable than ACET reduction in many real-time embedded systems. In this article, we propose a compile-time optimization method aimed at reducing WCET in real-time embedded systems. In the proposed method, based on the predicated execution capability of embedded... 

    High performance and predictable memory controller for multicore mixed-criticality real-time systems

    , Article IET Computers and Digital Techniques ; Volume 13, Issue 5 , 2019 ; 17518601 (ISSN) Dabaghi, A ; Farbeh, H ; Sharif University of Technology
    Institution of Engineering and Technology  2019
    Abstract
    Multicore processors are widely used in today's real-time embedded systems to satisfy the performance and predictability requirements as well as reduce cost. A vast majority of multicore embedded systems are running several tasks with mixed-criticality, in which the non-functional requirements of the tasks are different or even conflicting. A major challenge in mixed-criticality systems is to maximise the efficiency of shared resources while satisfying the criticality requirements. Shared memory is a key component that should be well managed and memory controller plays the main role in this case. Several memory controllers have been introduced in the literature for multicore processors. In... 

    High-Performance predictable NVM-Based instruction memory for real-time embedded systems

    , Article IEEE Transactions on Emerging Topics in Computing ; Volume 9, Issue 1 , 2021 , Pages 441-455 ; 21686750 (ISSN) Bazzaz, M ; Hoseinghorban, A ; Poursafaei, F ; Ejlali, A ; Sharif University of Technology
    IEEE Computer Society  2021
    Abstract
    Worst case execution time and energy consumption are two of the most important design constraints of real-time embedded systems and memory subsystem has a major impact on both of them. Therefore, many recent studies have tried to improve the memory subsystem of embedded systems by using emerging non-volatile memories instead of conventional memories such as SRAM and DRAM. Indeed, the low leakage power dissipation and improved density of emerging non-volatile memories make them prime candidates for replacing the conventional memories. However, accessing these memories imposes performance and energy overhead and using them as the instruction memory could increase the worst case execution time,... 

    Thermal-Aware standby-sparing technique on heterogeneous real-time embedded systems

    , Article IEEE Transactions on Emerging Topics in Computing ; Volume 10, Issue 4 , 2022 , Pages 1883-1897 ; 21686750 (ISSN) Ansari, M ; Safari, S ; Yari Karin, S ; Gohari Nazari, P ; Khdr, H ; Shafique, M ; Henkel, J ; Ejlali, A ; Sharif University of Technology
    IEEE Computer Society  2022
    Abstract
    Low power consumption, real-time computing, and high reliability are three key requirements/design objectives of real-time embedded systems. The standby-sparing technique can improve system reliability while it might increase the temperature of the system beyond safe limits. In this paper, we propose a thermal-aware standby-sparing (TASS) technique that aims at maximizing the Quality of Service (QoS) of soft real-time tasks, which is defined as a function of the finishing time of running tasks. The proposed technique tolerates permanent and transient faults for multicore real-time embedded systems while meeting the Thermal Safe Power (TSP) as the core-level power constraint, which avoids... 

    Discrete feedback-based dynamic voltage scaling for safety critical real-time systems

    , Article Scientia Iranica ; Volume 20, Issue 3 , 2013 , Pages 647-656 ; 10263098 (ISSN) Ahmadian, A. S ; Hosseingholi, M ; Ejlali, A ; Sharif University of Technology
    2013
    Abstract
    Recently, the tradeoff between low energy consumption and high fault-tolerance has attracted a lot of attention as a key issue in the design of real-time systems. Dynamic Voltage Scaling (DVS) is commonly employed as one of the most effective low energy techniques for real-time systems. It has been observed that the use of feedback-based methods can improve the effectiveness of DVS-enabled systems. In this paper, we have investigated reducing the energy consumption of fault-tolerant hard real-time systems using the feedback control theory. Our proposed method makes the system capable of selecting the proper frequency and voltage settings in order to reduce the energy consumption, while... 

    Low-energy standby-sparing for hard real-time systems

    , Article IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ; Volume 31, Issue 3 , 2012 , Pages 329-342 ; 02780070 (ISSN) Ejlali, A ; Al Hashimi, B. M ; Eles, P ; Sharif University of Technology
    Abstract
    Time-redundancy techniques are commonly used in real-time systems to achieve fault tolerance without incurring high energy overhead. However, reliability requirements of hard real-time systems that are used in safety-critical applications are so stringent that time-redundancy techniques are sometimes unable to achieve them. Standby sparing as a hardware-redundancy technique can be used to meet high reliability requirements of safety-critical applications. However, conventional standby-sparing techniques are not suitable for low-energy hard real-time systems as they either impose considerable energy overheads or are not proper for hard timing constraints. In this paper we provide a technique... 

    A comparative study of system-level energy management methods for fault-tolerant hard real-time systems

    , Article IEEE Transactions on Computers ; Volume 60, Issue 9 , 2011 , Pages 1288-1299 ; 00189340 (ISSN) Aminzadeh, S ; Ejlali, A ; Sharif University of Technology
    2011
    Abstract
    Low energy consumption and fault tolerance are often key objectives in the design of real-time embedded systems. However, these objectives are at odds, and there is a trade-off between them. Real-time systems usually use system level energy reduction methods, i.e., dynamic voltage scaling (DVS) and dynamic power management (DPM). Also hard real-time systems often use replication to achieve fault tolerance. In this paper, we investigate the impact of system level energy reduction methods on both the reliability and energy consumption of hard real-time systems which use replication for fault tolerance. In this analysis, we have considered four various existing energy management methods: 1)... 

    Stretch: Exploiting service level degradation for energy management in mixed-criticality systems

    , Article CSI Symposium on Real-Time and Embedded Systems and Technologies, RTEST 2015, 7 October 2015 through 8 October 2015 ; October , 2015 , Page(s): 1 - 8 ; 9781467380478 (ISBN) Taherin, A ; Salehi, M ; Ejlali, A ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    Mixed-criticality systems are introduced due to industrial interest to integrate different types of functionalities with varying importance into a common and shared computing platform. Low-energy consumption is vital in mixed-criticality systems due to their ever-increasing computation requirements and the fact that they are mostly supplied with batteries. In case when high-criticality tasks overrun in such systems, low-criticality tasks can be whether ignored or degraded to assure high-criticality tasks timeliness. We propose a novel energy management method (called Stretch), which lowers the energy consumption of mixed-criticality systems with the cost of degrading service level of... 

    Performability comparison of schedulability conditions in real-time embedded systems

    , Article Proceedings - 3rd International Conference on Dependability, DEPEND 2010, 18 July 2010 through 25 July 2010, Venice, Mestre ; July , 2010 , Pages 70-75 ; 9780769540900 (ISBN) Bashiri, M ; Miremadi, S. G ; IARIA ; Sharif University of Technology
    2010
    Abstract
    In modern safety-critical real-time embedded systems, performance and reliability are two most important parameters. The joint consideration of these two parameters is called performability. This paper evaluates and compares different schedulability conditions, which are used for scheduling tasks with fault-tolerant Rate-Monotonic (RM) algorithm, with respect to their performability. The task reexecution scheme is used to implement fault tolerance in the RM scheduling algorithm. To evaluate the schedulability conditions, a software tool is developed to simulate an embedded processor with m schedulable periodic tasks. The results show that among five different schedulability conditions used... 

    LEXACT: low energy n-modular redundancy using approximate computing for real-time multicore processors

    , Article IEEE Transactions on Emerging Topics in Computing ; Volume 8, Issue 2 , 2020 , Pages 431-441 Baharvand, F ; Miremadi, S. G ; Sharif University of Technology
    IEEE Computer Society  2020
    Abstract
    Multicore processors are becoming popular in safety-critical applications. A series of these applications comprises of kernels where inexact computations may produce results within the boundary of sufficient quality though, for which the reliability should stay at the maximum possible level. Intrinsic core-level redundancy in multicore processors can be leveraged to achieve the desired reliability level in form of N-modular redundancy (NMR). While NMR provides a proactive means of reliability for critical systems, it has two main drawbacks: Increase in the area and energy consumption that are both limiting factors in the embedded systems. This paper presents a software-based method to... 

    Fast and predictable non-volatile data memory for real-time embedded systems

    , Article IEEE Transactions on Computers ; 2020 Bazzaz, M ; Hoseinghorban, A ; Ejlali, A ; Sharif University of Technology
    IEEE Computer Society  2020
    Abstract
    Energy consumption and predictability are two important constraints in designing real-time embedded systems and one of the recently proposed solutions for the energy consumption problem is the use of non-volatile memories due to their lower leakage power consumption. Furthermore, because of their non-volatile nature, the use of these memories helps normally-off computing and energy harvesting systems. However, the write access latency of non-volatile memories is considerably more than that of SRAM which can decrease the performance and predictability of the system. We present a predictable non-volatile data memory for real-time embedded systems which improves both worst-case execution time... 

    Ring- DVFS: reliability-aware reinforcement learning-based DVFS for real-time embedded systems

    , Article IEEE Embedded Systems Letters ; October , 2020 , Page:1-1 Yeganeh Khaksar, A ; Ansari, M ; Safari, S ; Yari Karin, S ; Ejlali, A ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2020
    Abstract
    Dynamic Voltage and Frequency Scaling (DVFS) is one of the most popular and exploited techniques to reduce power consumption in multicore embedded systems. However, this technique might lead to a task-reliability degradation because scaling the voltage and frequency increases the fault rate and the worst-case execution time of the tasks. In order to preserve taskreliability at an acceptable level as well as achieving power saving, in this letter, we have proposed an enhanced DVFS method based on reinforcement learning to reduce the power consumption of sporadic tasks at runtime in multicore embedded systems without task-reliability degradation. The reinforcement learner takes decisions based... 

    ReMap: reliability management of peak-power-aware real-time embedded systems through task replication

    , Article IEEE Transactions on Emerging Topics in Computing ; August , 2020 , Pages: 1-1 Yeganeh Khaksar, A ; Ansari, M ; Ejlali, A ; Sharif University of Technology
    IEEE Computer Society  2020
    Abstract
    Increasing power densities in future technology nodes is a crucial issue in multicore platforms. As the number of cores increases in them, power budget constraints may prevent powering all cores simultaneously at full performance level. Therefore, chip manufacturers introduce a power budget constraint as Thermal Design Power (TDP) for chips. Meanwhile, multicore platforms are suitable for implementation of fault-tolerance techniques to achieve high reliability. Task Replication is a known technique to tolerate transient faults. However, careless task replication may lead to significant peak power consumption. In this paper, we consider the problem of achieving a given reliability target...