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    ScTMR: A scan chain-based error recovery technique for TMR systems in safety-critical applications

    , Article Proceedings -Design, Automation and Test in Europe, DATE, 14 March 2011 through 18 March 2011 ; March , 2011 , Pages 289-292 ; 15301591 (ISSN) ; 9783981080179 (ISBN) Ebrahimi, M ; Miremadi, S. G ; Asadi, H ; Sharif University of Technology
    2011
    Abstract
    We propose a roll-forward error recovery technique based on multiple scan chains for TMR systems, called Scan chained TMR (ScTMR). ScTMR reuses the scan chain flip-flops employed for testability purposes to restore the correct state of a TMR system in the presence of transient or permanent errors. In the proposed ScTMR technique, we present a voter circuitry to locate the faulty module and a controller circuitry to restore the system to the fault-free state. As a case study, we have implemented the proposed ScTMR technique on an embedded processor, suited for safety-critical applications. Exhaustive fault injection experiments reveal that the proposed architecture has the error detection and... 

    Design and Evaluation of a Master/Checker Method for an Embedded Processor

    , M.Sc. Thesis Sharif University of Technology Ebrahimi, Mojtaba (Author) ; Miremadi, Ghasem (Supervisor)
    Abstract
    Ever increasing applications of embedded systems have motivated the designers to pay special attention to the design requirements of such systems. Among embedded applications, safety-critical systems have high reliability requirements as failures in such systems may endanger human life or result in catastrophic consequences. Embedded processors as the computation cores of embedded systems are very crucial from reliability point of view. This is because; a failure in the processor most probably leads to a system failure. One effective way to protect embedded processors against environmental faults is to use system level fault-tolerant techniques such as Master/Checker (M/C) or Triple Modular... 

    Transient Fault Detection in Embedded Processors using Built In Self-Test (BIST) Facilities

    , M.Sc. Thesis Sharif University of Technology Ebrahimi, Mohammad (Author) ; Miremadi, Ghassem (Supervisor)
    Abstract
    Ever increasing applications of embedded systems have motivated designers to pay special atten-tion to the design requirements of such systems. Among embedded applications, safety-critical sys-tems have high reliability requirements as failures in such systems may endanger human life or re-sult in catastrophic consequences. Embedded processors as the computation cores of embedded systems are very crucial from reliability point of view. Reducing feature size, power supply voltage and also increasing operating frequency have increased the occurance rate of transient faults in such processors. Built in Self-Test facilities available in many of embedded systems forms about 70% of total cost in... 

    A Scheme for Counterfeit Chip Detection Using Scan Chain

    , M.Sc. Thesis Sharif University of Technology Hashemi, Mona (Author) ; Hesabi, Shahin (Supervisor)
    Abstract
    With constant increase in the rate of VLSI circuits manufactured in sites separate from the designers and computer architects, global concern regarding the possibility of integration of malware by the manufacturing foundries has arisen. Particularly, one main issue that affects relability of the chips is modifications or additions with malicious intension, known as Harware Trojans, which are easily applicable during design and manufacturing phase of chip. This study intends to introduce a model based on the scan chain, a method is provided for intellectual property protection. Currently available IP protection solutions are usually limited to protect single FPGA configurations and require... 

    A Scan Chain-Based Aging Monitoring Scheme for Detection of Recycled Chips

    , M.Sc. Thesis Sharif University of Technology Ostovar, Atanaz (Author) ; Hesabi, Shahin (Supervisor)
    Abstract
    Today's latest technology integrated circuits are manufactured for a wide range of applications. With the constant increase in the usage rate of integrated circuits, designing a high reliable system is of utmost importance. The avoidance of counterfeit components is a major challenge of hardware security and trust. Counterfeit components cause lower performance and reduced life span. They are of great concern to the manufacturers and consumers of electronic systems, impacting the security and reliability of these systems. If these parts end up in critical applications like medical systems, satellites, aerospace, or power plants, the results could be catastrophic. So far, there are different... 

    Low-cost scan-chain-based technique to recover multiple errors in TMR systems

    , Article IEEE Transactions on Very Large Scale Integration (VLSI) Systems ; Volume 21, Issue 8 , 2013 , Pages 1454-1468 ; 10638210 (ISSN) Ebrahimi, M ; Miremadi, S. G ; Asadi, H ; Fazeli, M ; Sharif University of Technology
    2013
    Abstract
    In this paper, we present a scan-chain-based multiple error recovery technique for triple modular redundancy (TMR) systems (SMERTMR). The proposed technique reuses scan-chain flip-flops fabricated for testability purposes to detect and correct faulty modules in the presence of single or multiple transient faults. In the proposed technique, the manifested errors are detected at the modules' outputs, while the latent faults are detected by comparing the internal states of the TMR modules. Upon detection of any mismatch, the faulty modules are located and the state of a fault-free module is copied into the faulty modules. In case of detecting a permanent fault, the system is degraded to a...