Sharif Digital Repository

The importance of shared memory (scratchpad memory) in GPGPU programming, the memory size limits of GPGPUs and the influence of shared memory on overall performance of the GPGPU has led to its performance optimization. Moreover, the trend of new GPGPUs design shows that the ratio of shared memory to processing elements is going smaller. As a result, the limited capacity of shared memory becomes a bottleneck for a GPU to host a high number of thread blocks, limiting the otherwise available thread-level parallelism (TLP). In this thesis we introduced a reconfigurable and adaptive shared memory architecture for GPGPUs based on resource sharing which can be exploited for throughput improvement... 

Graphics Processing Units (GPUs) employ a scratch-pad memory (a.k.a., shared memory) in each streaming multiprocessor to accelerate data sharing among the threads in a thread block and provide a software-managed cache for the programmers.However, we observe that about 60% of GPU workloads of several well-known benchmark suites do not use shared memory. Morever, among those workloads that use shared memory, about 42% of shared memory is not utilized, on average. On the other hand, we observe that many general purpose GPU applications suffer from the low hit rate and limited bandwidth of L1 data cache.We aim to use shared memory space and its corrsponding bandwidth for improving L1 data cache,... 

Although cloud porcessors have lots of benefits, they have brought new challenges for designers; one of these issues, is information leakage through Timing Channel Attack in shared hardware resources. Among these shared resources, main memory controller is less understood. Also applying timing channel protection technquies to shared memory controller, in comparison with other parts such as NoC, caches, etc, can impose high performance overhead to system throughput. Temporal Partitioning (TP) is the baseline secure scheduling algorithm that was proposed for cope with timing channel attack in shared memory controller; but beside this protection, TP compels high performance degradation. In this...