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    Triple-tunnel junction single electron transistor (TTJ-SET)

    , Article Modern Physics Letters B ; Volume 25, Issue 17 , 2011 , Pages 1487-1501 ; 02179849 (ISSN) Shahhoseini, A ; Saghafi, K ; Moravvej Farshi, M. K ; Faez, R ; Sharif University of Technology
    2011
    Abstract
    We propose a triple-tunnel junction single electron transistor (TTJ-SET). The proposed structure consists of a metallic quantum-dot island that is capacitive coupled to a gate contact and surrounded by three tunnel junctions. To the best of our knowledge, this is the first instance of introducing this new structure that is suitable for both digital and analog applications. I-V D characteristics of the proposed TTJ-SET, simulated by a HSPICE macro model for various gate voltages, are in excellent agreement with those obtained by SIMON, which is a Monte-Carlo based simulator. We show how one can design a digital inverter by using a single TTJ-SET. We also show that, under suitable conditions,... 

    A New SPICE macro-model for the simulation of single electron circuits

    , Article Journal of the Korean Physical Society ; Volume 56, Issue 4 , 2010 , Pages 1202-1207 ; 03744884 (ISSN) Karimian, M. R ; Dousti, M ; Pouyan, M ; Faez, R ; Sharif University of Technology
    2010
    Abstract
    To get a more accurate model for the simulation of single electron transistors (SETs), we propose a new macro-model that includes an electron tunneling time calculation. In our proposed model, we have modified the previous models and have applied some basic corrections to the formulas. In addition, we have added a switched capacitor circuit, as a quantizer, to calculate the electron tunneling time. We used HSPICE for a high-speed simulation and observed that the simulation results obtained from our model match more closely with that of SIMON 2.0. We also could evaluate the time of electron tunneling through the barrier by using the quantizer. Clearly, our macro-model gives more accurate... 

    An improved macro-model for simulation of single electron transistor (SET) using HSPICE

    , Article TIC-STH'09: 2009 IEEE Toronto International Conference - Science and Technology for Humanity, 26 September 2009 through 27 September 2009, Toronto, ON ; 2009 , Pages 1000-1004 ; 9781424438785 (ISBN) Karimian, M ; Dousti, M ; Pouyan, M ; Faez, R ; Sharif University of Technology
    Abstract
    To get a more accurate model for simulation of single electron transistors (SETs), we have proposed a new macromodel that includes the ability of electron tunneling time calculation. In our proposed model, we have modified the previous models and applied some basic corrections to their formulas. In addition, we have added a switched capacitor circuit, as a quantizer, to calculate the electron tunneling time. We used HSPICE for high-speed simulation and observed that the simulation results obtained from our model matched more closely with that of SIMON 2.0. We also could evaluate the time of electron tunneling through the barrier by using the quantizer. Clearly, our macro-model gives more...