Sharif Digital Repository

The failure probability in SSDs increases when the number of Program/Erase (P/E) cycles increases. Traditionally, a group of SSDs are protected with parity disks, called SSD-based RAID. It has been shown that the reliability of RAIDs depends on the distribution of parities among SSDs. There are two main policies to distribute parities among SSDs in RAIDs, i.e., evenly and unevenly. By distributing parities evenly, all SSDs would wear out with the same rate, causing simultaneous failures of SSDs. By distributing parities unevenly, one of the SSDs in RAID may fail much earlier than the others. Both these two drawbacks, i.e., the simultaneous failures of SSDs and the rapid first failure of one... 

Over the past decades, Redundant Array of Independent Disks (RAIDs) have been configured based on mechanical characteristics of Hard Disk Drives (HDDs). With the advent of Solid-State Drives (SSDs), configurations such as stripe unit size can be far from the characteristics of SSDs. In this paper, we investigate the effect of stripe unit size on the endurance and the overall I/O performance of an SSD-based RAID array and compare the optimal stripe unit size with the suggested stripe unit sizes for HDD-based RAID. To this end, we first examine the number of extra page reads and writes imposed by write requests, and then observe the corresponding impact on the overall throughput and the... 

Erasure codes are applied in both HDD and SSD storage systems to improve the reliability. The design of erasure codes for SSD-based systems should be performed with respect to a specific feature of SSDs, i.e., endurance. Endurance is defined as the number of Program/Erase (P/E)-cycles that one SSD can endure for reliable operation. The common metric for comparing the endurance of two systems is the number of P/E-cycles, which is yielded by time-consuming simulations. This paper proposes two new metrics called DPD-factor and GDP-pattern, for comparing the effect of erasure codes on the endurance of systems based on their encoding designs, without simulation. With respect to the endurance,... 

One of the main issues in Solid State Drive (SSD)-based storage systems is endurance which is directly affected by the number of Program/Erase (P/E) cycles. The increment of P/E cycles increases the bit error rate threatening the reliability of SSDs. Erasure codes are used to leverage the reliability of storage systems but they also affect the number of P/E cycles based on their code pattern. A lower dependency between data and parities in the code pattern may lead to smaller number of P/E cycles providing better endurance. This paper introduces an Endurance Aware EVENODD (EA-EO), which minimizes the dependency between data and parities in the coding pattern. A simulation environment is used... 

Hybrid Multi-Level Cache Architectures (HCAs) are promising solutions for the growing need of high-performance and cost-efficient data storage systems. HCAs employ a high endurable memory as the first-level cache and a Solid-State Drive (SSD) as the second-level cache. Spin-Transfer Torque Magnetic RAM (STT-MRAM) is one of the most promising candidates for the first-level cache of HCAs because of its high endurance and DRAM-comparable performance along with non-volatility. However, STT-MRAM faces with three major reliability challenges named Read Disturbance, Write Failure, and Retention Failure. To provide a reliable HCA, the reliability challenges of STT-MRAM should be carefully addressed....