Sharif Digital Repository

This paper proposes some bounds on maximum of magnitude of a random mask in Fourier domain. The random mask is used in random sampling scheme. Having a bound on the maximum value of a random mask in Fourier domain is very useful for some iterative recovery methods that use thresholding operator. In this paper, we propose some different bounds and compare them with the empirical examples. © 2017 IEEE  

In this paper, we propose an algorithm for recovery of sparse and low-rank components of matrices using an iterative method with adaptive thresholding. In each iteration of the algorithm, the low-rank and sparse components are obtained using a thresholding operator. The proposed algorithm is fast and can be implemented easily. We compare it with the state-of-the-art algorithms. We also apply it to some applications such as background modeling in video sequences, removing shadows and specularities from face images, and image restoration. The simulation results show that the proposed algorithm has a suitable performance with low run-time. © 2017 Elsevier Inc  

This paper presents a single-ended low-power 7T SRAM cell in FinFET technology. This cell enhances read performance by isolating the storage node from the read path. Moreover, disconnecting the feedback path of the cross-coupled inverters during the write operation enhances WSNM by nearly 7.7X in comparison with the conventional 8T SRAM cell. By using only one bit-line, this cell reduces power consumption and PDP compared to the conventional 8T SRAM cell by 82% and 35%, respectively. © 2018 Elsevier GmbH  

This paper presents a robust and low-power single-ended robust 11T near-threshold SRAM cell in 10-nm FinFET technology. The proposed cell eliminates write disturbance and enhances write performance by disconnecting the path between cross-coupled inverters during the write operation. FinFETs suffer from width quantization, and SRAM performance is highly dependent to transistors sizing. The proposed structure with minimum sized tri-gate FinFETs operates without failure under major process variations. In addition, read disturbance is reduced by isolating the storage nodes during the read operations. To reduce power consumption this cell uses only one bit-line for both read and write operations.... 

Based on the dynamic criteria for data stability, we introduce segmented virtual grounding architecture with extended read, write noise margin to realize a low leakage current, energy efficient SRAM module. The architecture offers subthreshold operation for the entire module, except for the selected segments. In addition, a new operational mode for the SRAM cell is introduced which allows only the bitlines of the selected columns to be discharged in an operation. The stability of the cells is enhanced in both read and write operation by controlling the cell access time and cell supply voltage, respectively. A 2048$, imes,$20 bit eSRAM unit is implemented in a regular 0.13 $muhbox{m} $ CMOS...