Sharif Digital Repository

In this paper, we consider a wireless cooperative network with a wireless-powered energy harvesting (EH) relay. The relay employs a time switching (TS) policy that switches between the EH and data decoding (DD) modes. Both energy and data buffers are kept at the relay to store the harvested energy and decoded data packets, respectively. In this paper, we derive static and dynamic TS policies that maximize the system throughput or minimize the average transmission delay. In particular, in the static policies, the EH or DD mode is selected with a pre-determined probability. In contrast, in a dynamic policy, the mode is selected dynamically according to the states of data and energy buffers. We... 

Sectionalizing switches (SSs) are installed in distribution networks to provide ring and maneuver points, thereby increasing service reliability. These switches are either manual switches (MSs) or remote controlled switches (RCSs). The switches are usually assumed to be fully reliable. However, in practice, their performance is not always ideal. Actually, the switches may sometimes experience malfunction, which reduces their ability to enhance system reliability. The present study proposes a model to consider the malfunction possibility of the switches in their optimal placement problem. The model helps to minimize the total costs of SSs as well as the interruption costs incurred by... 

In Mixed-Criticality (MC) systems, there are often multiple Worst-Case Execution Times (WCETs) for the same task, corresponding to system operation mode. Determining the appropriate WCETs for lower criticality modes is non-trivial; while on the one hand, a low WCET for a mode can improve the processor utilization in that mode, on the other hand, using a larger WCET ensures that the mode switches are minimized, thereby maximizing the quality-of-service for all tasks, albeit at the cost of processor utilization. Although there are many studies to determine WCET in the highest criticality mode, no analytical solutions are proposed to determine WCETs in other lower criticality modes. In this... 

In this note, it is shown that the Lyapunov function-based analyses done in the above-titled article to design a backstepping sliding mode controller contain some drawbacks. These drawbacks include ignoring some terms in simplification of time-derivative of the considered Lyapunov functions, which do not vanish in a finite-time. Moreover, by presenting a counterexample, it is revealed that the finite-time convergence of the error signals cannot be necessarily concluded from a Lyapunov function-based inequality used in the aforementioned article. © 2004-2012 IEEE  

Recently announcement of a physical realization of a fundamental circuit element called memristor by researchers at Hewlett Packard (HP) has attracted so much interest worldwide. Combination of this newly found element with crossbar interconnect technology, opened a new field in designing configurable or programmable electronic systems which can have applications in signal processing and artificial intelligence. In this paper, based on the simple memristor crossbar structure, we will propose a new mixed analog-digital circuit as a hardware implementation of the sign-sign least mean square (LMS) adaptive filter algorithm. In this proposed hardware, any multiplication and addition is performed... 

The series configuration of fast semiconductor switches seems to be the key component in the high-voltage and fast rising time pulse generation. In this approach, two important issues must be considered. The first is to provide a safe operating condition for the switches in transient intervals. The second is to design a gate drive system with the capability of driving a large number of discrete devices simultaneously. The aim of this paper is to obviate these two requirements. First, different factors affecting the unbalanced voltage sharing between the series switches are discussed. In this investigation, the switch-to-ground parasitic capacitance effect has been recognized as the major... 

The conventional time-modulated arrays (TMAs) have a low radiation efficiency, since each antenna turns off at specific time slots. In this paper, first, the efficiency of TMA is investigated analytically. Next, the optimized switching sequences are proposed to enhance the radiation efficiency of a specific sideband, while preserving the level of the other sidebands. The practical hardware limitations are considered in the switching sequence design. Moreover, a low-cost flexible eight-element printed dipole array operating at 1.2-1.4 GHz is implemented to verify the proposed algorithms. The measured radiation patterns indicate that by applying the proposed sequences, the TMA efficiency... 

Nanosecond pulsed-power generators have many applications in industries. As the rise time and fall time of conventional semiconductor switches are usually more than a few nanoseconds, it is necessary to employ special switches or new pulse generating methods to achieve nanosecond pulses. A common method for producing narrow pulse voltage waveforms is using the reverse recovery process of diodes. In this method, a super fast recovery diode is used as an opening switch in an inductor current path. A drift step recovery diode can form a rapid cut-off current front; Hence this method can be an effective solution to generate narrow pulses. This paper describes an investigation about the effect of... 

Effect of relaxation time on the performance of photonic crystal optical bistable switches based on Kerr nolinearity is discussed. This paper deals with optical pulses with the duration of about 50 ps. In such cases the steady state response of the optical device can be used to approximate the pulse evolution if the nonlinearity is assumed instantaneous, hence analytical solutions such as the coupled mode theory can be used to obtain the time evolution of the electromagnetic fields. However if the relaxation time of the material nonlinear response is also considered, changes in the power levels and in the shape of the hystersis loop is observed. In this case, we use the nonlinear finite... 

This paper proposes a novel FPGA-based matrix-inversion technique that is specifically tailored and optimized for real-time electromagnetic transients simulation of power electronic converters with high switching frequency. This is the first reported solution that is capable of solving the real-time equations related to using ideal switch model and the associated circuitry in very small time-steps (e.g., an average of 36 ns in a three-phase back-to-back converter case study), without requiring large amount of memory, being limited to small number of switches, adding parasitic elements, or depending on a priori knowledge of the circuit operation or switching strategy. The accuracy of the... 

An increasing trend for reducing cost, space, and weight leads to modern embedded systems that execute multiple tasks with different criticality levels on a common hardware platform while guaranteeing a safe operation. In such Mixed-Criticality (MC) systems, multiple Worst-Case Execution Times (WCETs) are defined for each task, corresponding to system operation mode to improve the MC system’s timing behavior at run-time. Determining the appropriate WCETs for lower criticality modes is non-trivial. On the one hand, considering a very low WCET for tasks can improve the processor utilization by scheduling more tasks in that mode, on the other hand, using a larger WCET ensures that the mode... 

An increasing trend for reducing cost, space, and weight leads to modern embedded systems that execute multiple tasks with different criticality levels on a common hardware platform while guaranteeing a safe operation. In such mixed-criticality (MC) systems, multiple worst case execution times (WCETs) are defined for each task, corresponding to the system operation mode to improve the MC system's timing behavior at runtime. Determining the appropriate WCETs for lower criticality (LC) modes is nontrivial. On the one hand, considering a very low WCET for tasks can improve the processor utilization by scheduling more tasks in that mode, on the other hand, using a larger WCET ensures that the...