Implementation of the Digital Part of DVB-T Protocol with Reduced Power and Area, M.Sc. Thesis Sharif University of Technology ; Hessabi, Shaahin (Supervisor) ; Sharifkhani, Mohammad (Supervisor)
Abstract
An implementation of Digital Section of a DVB-T receiver has been introduced in this research. Nowadays, low-power and area-efficient designs have proven their importance in IC design aspect, so many low-power and area efficient approaches have been considered in this implementation. This design has been segregated into independent blocks, and each of them has been designed respect to the design goals. After that, all these blocks linked together and a whole system design implemented in gate level, then downloaded into a FPGA (Field programmable Gate Array) to test the timing and functionality of implemented blocks. In this thesis, some innovations have been introduced. A new algorithm for...
Cataloging briefImplementation of the Digital Part of DVB-T Protocol with Reduced Power and Area, M.Sc. Thesis Sharif University of Technology ; Hessabi, Shaahin (Supervisor) ; Sharifkhani, Mohammad (Supervisor)
Abstract
An implementation of Digital Section of a DVB-T receiver has been introduced in this research. Nowadays, low-power and area-efficient designs have proven their importance in IC design aspect, so many low-power and area efficient approaches have been considered in this implementation. This design has been segregated into independent blocks, and each of them has been designed respect to the design goals. After that, all these blocks linked together and a whole system design implemented in gate level, then downloaded into a FPGA (Field programmable Gate Array) to test the timing and functionality of implemented blocks. In this thesis, some innovations have been introduced. A new algorithm for...
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