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Miraki, Mohammad | 2014

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 45419 (05)
  4. University: Sharif University of Technology
  5. Department: Electrical Engineering
  6. Advisor(s): Sharif Khani, Mohammad
  7. Abstract:
  8. With the advancement of the technology, Design of low power devices such as biomedical systems, wireless sensor network, portable devices and … has received more attention. Digitally controlled oscillator (DCO) is one of the sub-blocks in systems such as all digital phase locked loop (ADPLL) which consumes the major power of the system. Therefore, Design of a low power DCO will decrease the power consumption of the system significantly.
    In this thesis, a digital control oscillator which is ultra low power is design for system on chip applications. Coarse-Fine architecture is used with binary weighted cells in this design. For the Coarse tuning stage, a new delay cell is proposed which consumes much less power than previous reported works. Moreover, in Fine tuning stages two new cells are designed which consumes lower power than conventional works.
    The designed DCO is simulated in 0.18umCMOS technology with power supply of 1.8V. Results show that the designed DCO achieves 12-720MHz frequency range. This system consumes 10.87uW and 40.76uW in 12MHz and 200MHz respectively and has the tuning resolution of 2.12ps
  9. Keywords:
  10. Power Consumption ; Digitally Controlled Oscillator (DCO) ; All Digital Phase Locked Loop ; Delay Cell ; Coars-Fine Architecture

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