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Design and Implementation of Customized Architecture for Algebraic Integer-based FFT Computation

Moradi, Mohsen | 2016

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 49216 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Jahangir, Amir Hossein
  7. Abstract:
  8. By using an encoding scheme based on Algebraic Integers (AIs), we study in this thesis how to map the real numbers needed in the computation of the FFT to integer numbers, in order to prevent error production and propagation throughout the intermediate stages of the FFT computation. To reconstruct encoded data, a decoding stage is to be used at the end of the FFT computation. AI-encoding poses two challenges; how to determine suitable AI bases and an unwanted growth in the number of data passes. This research work, firstly, determines an appropriate FFT architecture, and then, proposes a dedicated architecture based on AI-encoding. The basic and also the proposed dedicated architecture are synthesized using FPGA Virtex-5 chip and the SQNR (Signal to Quantization Noise Ratio) is calculated for 1000 sets of random inputs through Monte Carlo algorithm. The implementation results show that the SQNR for the proposed 16-point AI-based FFT processor has improved by 33 dB (i.e., about 2000 times better) at a cost of about three times hardware area, compared to the basic architecture. Further, the proposed 64-point AI-based FFT processor has gained 40.5 dB (i.e., more than 10000 times) improvement in SQNR, but the hardware cost has increased about 5.5 times compared to the basic architecture
  9. Keywords:
  10. Fast Fourier Transformation (FFT) ; Coding ; Twiddle Factor ; Signal to Quantization Ratio (SQNR)

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