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TDC & MMD Design for Bluetooth Low Energy Standard Transmitter

Ghadami, Omid | 2016

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 49534 (05)
  4. University: Sharif University of Technology
  5. Department: Electrical Engineering
  6. Advisor(s): Fotowwat Ahmadi, Ali
  7. Abstract:
  8. IoE devices are going to integrate with our environment. It has been predicted that there would be more than 6 connected devices per each person by 2020. Currently what obstruct this technology from continuing its evolusion path, is its dependence on Ultra Low-Power devices, and for this reason there is a huge concenteration on Radio-Frequency standards which can make devices more power efficient. Within these standards, Bluetooth Low Energy (BLE) attracted designers consentration for its similarities with conventional Bluetooth and its dominance in cellphones and other portable devices.In this project, we have attempted to design a trasmitter for BLE standard based on an All Digital Phase lock Loop (ADPLL). As there is a great number of reports which conclude this structure can reduce power consumption. We have categorized available structures to Phase Domain Based All Digital Phase lock Loop (PD-ADPLL) and Frequency Domain Based All Digital Phase lock Loop (FD-ADPLL); Then we have shown that the best method for building an ADPLL is FD-ADPLL structure.Then we have tried to study FD-ADPLL building blocks. In this way, we have proposed two new structures for Time-to-Digital converter (TDC) and Multi-Modulous-Divider (MMD). In addition,we have shown the best architecture for other building blocks like Digital Controlled Oscillator (DCO), for clarifying the next step in future developments of this project.As a result of these studies, we have proposed a new low power TDC structure, which is Frequency aware. Thus, there is no need to Frequency Lock Loop in FD-ADPLL’s anymore. In addition, in MMD block, we have proposed a new circuit, which can work with lower power in contrast to its pairs. This new MMD is the world fitst 3/4 Wide-Band low power multi-modulous divider, and it can solve many problems related to manufacturing issues.Both of these new blocks have shown more than 50 percent of improvement in contrast to conventional structures. Simulation of final design on 180nm CMOS process have proven that these architecture are good enough to compete with their pairs in advanced technology nodes such as 40nm
  9. Keywords:
  10. Time to Digital Converter ; Internet of Things ; All Digital Phase Locked Loop ; Bluetooth Low Energy ; Multi-Modulus Divider (MMD)

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