A Power Efficient Routing Architecture for Reconfigurable Device, M.Sc. Thesis Sharif University of Technology ; Asadi, Hossein (Supervisor)
Abstract
FPGA is a suitable substrate for implementation of embedded systems, mobiles, and hand-held devices due to cost reduction for \emph{Non-Recurring Engineering (NRE)}, short time to market, design flexibility, and reprogramming capability. Significant downscaling of CMOS technology feature size has led to static power growth rate, which is a limiting factor in further scaling. Previous studies aimed at reducing power consumption, mainly have focused on the power consumption of logical resources. However, proposing a low power architecture in routing network affects the power consumption of FPGAs significantly, because of the dominant power consumption in the routing network. This thesis...
Cataloging briefA Power Efficient Routing Architecture for Reconfigurable Device, M.Sc. Thesis Sharif University of Technology ; Asadi, Hossein (Supervisor)
Abstract
FPGA is a suitable substrate for implementation of embedded systems, mobiles, and hand-held devices due to cost reduction for \emph{Non-Recurring Engineering (NRE)}, short time to market, design flexibility, and reprogramming capability. Significant downscaling of CMOS technology feature size has led to static power growth rate, which is a limiting factor in further scaling. Previous studies aimed at reducing power consumption, mainly have focused on the power consumption of logical resources. However, proposing a low power architecture in routing network affects the power consumption of FPGAs significantly, because of the dominant power consumption in the routing network. This thesis...
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