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A case for PIM support in general-purpose compilers

Sadeghi, P ; Sharif University of Technology | 2021

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  1. Type of Document: Article
  2. DOI: 10.1109/MDAT.2021.3095225
  3. Publisher: IEEE Computer Society , 2021
  4. Abstract:
  5. Newly developed 3D die stacking technologies affords us the possibility to revisit the idea of Processing-in-Memory (PIM) as implementation hurdles are overcome. We now have the opportunity to offload the data intensive parts of our program to the PIM in form of kernels to be able to take advantage of the high internal bandwidth of the memory modules. Memory access latency and bandwidth are two major bottlenecks in today’s high-performance computers and new use-cases are moving faster than ever before towards this mode of computing. With new graph processing and neural network applications being developed every day, having a performance model of such systems helps in predicting the behavior of these applications and determining whether such approach is even worth trying. Compiler support for these systems remains a niche to be explored before they are ready for consumer applications. IEEE
  6. Keywords:
  7. Bandwidth ; Memory architecture ; 3D die stacking ; Consumer applications ; Graph processing ; High performance computers ; Memory access latency ; Neural network application ; Performance Model ; Processing in memory ; Program compilers
  8. Source: IEEE Design and Test ; 2021 ; 21682356 (ISSN)
  9. URL: https://ieeexplore.ieee.org/document/9481304