Design and Implementation of a Multi-Standard Crypto-Processor

Bahadori, Milad | 2011

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 41445 (05)
  4. University: Sharif University of Technology
  5. Department: Electrical Engineering
  6. Advisor(s): Sharif Khani, Mohammad
  7. Abstract:
  8. The crypto-processors are used for encryption and decryption of the sensitive and important information. A crypto-processor converts input plaintext to ciphertext by an input key using a particular cryptographic algorithm. It also converts ciphertext to plaintext by the same or another key. Cryptographic standards are divided in two types: symmetric key algorithms (private key) and asymmetric key algorithms (public key). Current processors generally support only one or a few number of cryptographic algorithms. The motivation of this project is design and implementation of a multi-standard crypto-processor which supports the most of symmetric and asymmetric cryptographic algorithms, such as Triple DES, AES, RSA and ECC, and their key generation algorithms. Also, the specific blocks are considered in this crypto-processor which support the hash algorithms, such as MD5, SHA-1 and SHA-256. The VLIW architecture of the crypto-processor consists of a data memory (DMEM), an instruction memory (IMEM), an arithmetic unit and a control unit. The datapath in this architecture is 32 bits wide which is suited for AES and Hash functions as well as public key cryptographic algorithms. The arithmetic unit consists of the sub-blocks of hash algorithms, AES and logic units, a programmable modular adder/subtractor unit and a modular multiplier unit which are programmable in both fields GF(p) and GF(2m). The tasks of control unit are decoding of instructions, generation of data memory and instruction memory address, data flow control, branch type control and managing the operations of arithmetic unit. The steps of cryptographic algorithms are translated to the micro code using instruction sets, and then they are stored in the instruction memory. The data memory is used for storing input data, output data and middle variables and constants of the cryptographic algorithms. The designed crypto-processor has been fabricated as an Application Specified Integrated Circuit (ASIC) chip in 0.18 µm CMOS technology. This processor works as a crypto-coprocessor with 40 MHz maximum frequency along with the main processor of a typical SmartCard. The chip area of the crypto-processor is 0.3 mm2, and its power consumption is reduced by 20 percent compared to the latest works. All of the mentioned algorithms and their key generation processes are implemented optimally in this crypto-processor, and in the several cases their execution times are reduced by 50 percent.
  9. Keywords:
  10. Cryptography ; Symmetric-Key Block Cipher ; Public Key Cryptography ; Application Specific Integrated Circuit (ASIC) ; Hash Function ; Crypto-Processor

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