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Design of Reconfigurable Hardware Security Module Based on Network Protocol Detection
Zohouri, Hamid Reza | 2014
1958
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- Type of Document: M.Sc. Thesis
- Language: Farsi
- Document No: 45569 (19)
- University: Sharif University of Technology
- Department: Computer Engineering
- Advisor(s): Jahangir, Amir Hossein
- Abstract:
- Nowadays, in the presence of different types of computer attacks and different methods of eavesdropping on network communications, nobody can deny the importance of cryptography. Hardware Security Modules that are specifically designed for this purpose are widely used as a fast and reliable tool for encrypting data in computer networks. In this project, using the common and well-known FPGA platform and by leveraging the reconfigurability feature of this platform and also by adding a network protocol detection module to the traditional architecture of Hardware Security Modules, a novel module has been designed and implemented that can encrypt and decrypt data in a communication network, at layer 2 of OSI network model, without causing any disruptions in the normal operation of the network.
Results obtained from testing the module using standard network device testers show that the implemented module, apart from being able to work transparently and without the knowledge of the two sides of the communication and also without hampering the normal operation of the network, can encrypt data at the sending node and decrypt it at the receiving node using the well-known AES algorithm, at near line speed (1 Gbps) and with negligible latency. Apart from this, the module was designed in a way permitting to easily change the cryptographic policy of the designed module, based on detecting the communication protocol in layer 2 of the OSI network model, by utilizing the partial reconfiguration feature in modern FPGAs.
- Keywords:
- Reconfiguration ; Cryptography ; Network Protocol ; Reconfigurable Hardware ; Hardware Security Module
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محتواي کتاب
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- 1- مقدمه
- 2- پیمانهی سختافزاری امنیتی
- 2-1- تعریف پیمانهی سختافزاری امنیتی
- 2-2- معماری کلی پیمانههای سختافزاری امنیتی
- 2-3- استانداردهای پیمانههای سختافزاری امنیتی
- 2-4- مقایسهی چند نمونه از پیمانههای سختافزاری امنیتی صنعتی
- 2-5- بسترهای پیادهسازی یک پیمانهی سختافزاری امنیتی
- 2-6- معماری یک نمونه پیمانهی سختافزاری امنیتی
- 2-7- نمای کلی معماری پیشنهادی
- 2-8- جمعبندی
- 3- بستر رمزنگاری
- 4- ارتباط تحت شبکه
- 5- پیادهسازی نهایی
- 6- بازپیکربندی
- 7- آزمون و نتایج
- 8- نتیجهگیری، دستآوردها و کارهای آتی
- 9- منابع
- پیوست (الف)- روال رمزگذاری در الگوریتم AES
- پیوست (ب)- حالتهای کاری استاندارد الگوریتم AES
- پیوست (ج)- روال دقیق بازپیکربندی جزیی
- پیوست (د)- نتایج آزمون با دستگاه Spirent Test Center