Power-efficient deterministic and adaptive routing in torus networks-on-chip

Rahmati, D ; Sharif University of Technology

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  1. Type of Document: Article
  2. DOI: 10.1016/j.micpro.2011.05.009
  3. Abstract:
  4. Modern SoC architectures use NoCs for high-speed inter-IP communication. For NoC architectures, high-performance efficient routing algorithms with low power consumption are essential for real-time applications. NoCs with mesh and torus interconnection topologies are now popular due to their simple structures. A torus NoC is very similar to the mesh NoC, but has rather smaller diameter. For a routing algorithm to be deadlock-free in a torus, at least two virtual channels per physical channel must be used to avoid cyclic channel dependencies due to the warp-around links; however, in a mesh network deadlock freedom can be insured using only one virtual channel. The employed number of virtual channels is important since it has a direct effect on the power consumption of NoCs. In this paper, we propose a novel systematic approach for designing deadlock-free routing algorithms for torus NoCs. Using this method a new deterministic routing algorithm (called TRANC) is proposed that uses only one virtual channel per physical channel in torus NoCs. We also propose an algorithmic mapping that enables extracting TRANC-based routing algorithms from existing routing algorithms, which can be both deterministic and adaptive. The simulation results show power consumption and performance improvements when using the proposed algorithms
  5. Keywords:
  6. Adaptive ; Deadlock ; Deterministic ; Mesh ; NoC ; Performance evaluation ; Power consumption ; SoC ; Torus ; VHDL ; Virtual channel ; Routing ; Algorithms ; Communication channels (information theory) ; Electric power utilization ; Network architecture ; Routing algorithms
  7. Source: Microprocessors and Microsystems ; Vol. 36, issue. 7 , October , 2012 , pp. 571-585 ; ISSN: 01419331
  8. URL: http://www.sciencedirect.com/science/article/pii/S0141933111000755