Power- and performance-efficient cluster-based network-on-chip with reconfigurable topology

Mehrvarzy, P ; Sharif University of Technology | 2016

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  1. Type of Document: Article
  2. DOI: 10.1016/j.micpro.2016.03.004
  3. Publisher: Elsevier , 2016
  4. Abstract:
  5. Topology is widely known as the most important characteristic of networks-on-chip (NoC), since it highly affects overall network performance, cost, and power consumption. In this paper, we propose a reconfigurable architecture and design flow for NoCs on which a customized topology for any target application can be implemented. In this structure, the nodes are grouped into some clusters interconnected by a reconfigurable communication infrastructure. The nodes inside a cluster are connected by a mesh to benefit from the interesting characteristics of the mesh topology, i.e. regular structure and efficient handling of local traffic. A reconfigurable inter-cluster topology then eliminates the major shortcoming of the mesh by providing short paths between remotely located nodes. We then present a design flow that maps the frequently communicating tasks of a given application onto the same cluster and exploits the reconfigurable infrastructure to set up appropriate inter-cluster connections. The experimental results show that by efficiently handling local and long-distance traffic flows, this structure is scalable, and power- and performance-efficient
  6. Keywords:
  7. Distributed computer systems ; Mapping ; Mesh generation ; Network-on-chip ; Reconfigurable architectures ; Reconfigurable hardware ; Servers ; Topology ; VLSI circuits ; Cluster-based networks ; Communicating tasks ; Communication infrastructure ; Performance ; Power ; Reconfigurable infrastructures ; Reconfiguration ; Target application ; Integrated circuit design
  8. Source: Microprocessors and Microsystems ; April , 2016 ; 01419331 (ISSN)
  9. URL: http://www.sciencedirect.com/science/article/pii/S0141933116300138