Evaluation of the topographical surface changes of silicon wafers after annealing and plasma cleaning

Stach, S ; Sharif University of Technology | 2020

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  1. Type of Document: Article
  2. DOI: 10.1007/s12633-019-00351-x
  3. Publisher: Springer Science+Business Media B.V , 2020
  4. Abstract:
  5. Purpose: The morphological stability of silicon single crystal wafers was investigated, after performing cleaning surface treatments based on moderate temperature annealing and plasma sputtering. Methods: The wafer surfaces were measured by Tapping mode atomic force microscopy in air, before and after the different treatments. The 3D images were segmented by watershed algorithm identifying the local peaks, and the stereometric parameters were extracted thereof. The analysis of variance allowed to better assess the statistically significant differences. Results: All the resulting quantities were critically discussed. It appeared that the different cleaning treatments affected differently the surface morphology changes occurring between pristine and treated surfaces, making them distinguishable in these terms. Conclusions: The presented combination of measurement technique and analyzing protocol potentially allows one to assess the structural differences of the surfaces of interest, when assumptions are made about the physical origin of the emerging topographical features. In the present case, if no etching is assumed, it appears that all cleaning protocols actually worsen the surface quality. The effect of these morphological differences on the functional properties of the surface should be ascertained independently. © 2019, Springer Nature B.V
  6. Keywords:
  7. Annealing ; Atomic force microscopy ; Plasma sputtering ; Silicon wafer ; Stereometric analysis ; Watershed segmentation ; Cleaning ; Etching ; Morphology ; Plasma stability ; Single crystals ; Surface morphology ; Morphological stability ; Silicon single crystals ; Statistically significant difference ; Tapping-mode atomic force microscopy ; Topographical features ; Silicon wafers
  8. Source: Silicon ; Volume 12, Issue 11 , 2020 , Pages 2563-2570
  9. URL: https://link.springer.com/article/10.1007/s12633-019-00351-x