Sharif Digital Repository

The purpose of this thesis is designing and implementation of a Carry Skip Adder using CMOS traditional technology and Gate Diffusion Input technique (GDI). I present a carry skip adder (CSKA) structure that has a higher speed, lower energy consumption compared with the conventional one. The Gate Diffusion Input is a novel technique for low power digital circuit design. This technique reduces the power dissipation, propagation delay, area of digital circuits and it maintains low complexity of logic design  

Few years ago, when people were talking about image sensors, the minds were automatically focusing on the pictures and photos that were/are taken for recording the memories. Nowadays, however, image sensors have prominent and unbelievable role in different aspects of our life, which "image" is only representing part of this role. A wide variety of applications image sensors can be enumerated such as, Scientific, security, medical, machine vision, ITs, biometrics, automotive, etc. To evaluate the quality of an image sensor, there are different parameters, from the dynamic range, high resolution and suitable speed to low noise, low power consumption and other parameters. The art of companies... 

In line with developments in the technology of integrated circuits, transistors are implemented in silicon. Although the price is reduced; design is more complicated, which causes the efficiency and power consumption to face some difficulties in such design. The reason why modern GDI-based circuit is the focus of attention is that in designing a digital circuit, less power is required while more efficiency is obtained. Lowering the complexity of the logic circuit can bring about reduction of power consumption and propagation delay and decrease the circuit space. GDI-based integrated circuits resemble MOSFET transistors but have fewer transistors and higher performance capability. This study... 

Oscillators are an important building block in the design of synthesizers for RF system applications. State-of-the-art operation defines that an oscillator should have the best spectral purity while consuming a low amount of power. In recent years, several methods have been presented for reducing phase noise separately in the 1/f2 and 1/f3 regions. As CMOS technology advances, the amount of power supplies decreases, which worsens the inherent flicker noise. In this thesis, it has been tried, while investigating the existing methods in the phase noise in this region, it presents the proposed oscillator which is based on a three-coupled transformer. This voltage bias oscillator operates at a... 

Optical computing is a new approach to the hardware implementation of devices that were previously implemented digitally and electronically. It has attracted a great deal of interest due to its benefits, which include high bandwidth, extensive internal connections, the possibility of parallel processing, high calculation speed, and low power consumption. Consequently, this type of implementation is regarded as an appropriate substrate for optical neural networks. Compact and low-power CMOS-compatible hardware can be used for on-chip optical neural networks (ONNs), enabling affordable and portable image classification solutions for applications like autonomous vehicles, healthcare, and... 

This thesis presents a four-antenna phased-array transceiver front-end for 5G applications. The designed front-end uses RF architecture and time division duplexing mode and operates in the 26~30 (GHz) band. In our design procedure, we have used a four-stage inductively degenerated common source LNA, a differential three-stage PA, and a vector-sum phase shifter. Circuit blocks are connected using traditional architecture, and an SPDT switch is used to determine the Tx/Rx mode of the system. A switching current reference is designed, which enables us to control the circuit gain over different process corners and temperatures.Each transmitter chain produces 13.42 (dBm) power at its operating... 

This paper presents a scalable and ultrasensitive magnetic biosensing scheme based on on-chip LC resonance frequency-shifting. The sensor transducer gain is demonstrated as being location-dependent on the sensing surface and proportional to the local polarization magnetic field strength |B|2 generated by the sensing inductor. To improve the gain uniformity, a periodic coil is proposed as a substitution for the standard process coil. As an implementation example, the circuit is designed in a 65nm CMOS process. The spatially uniform sensor gain of the array is verified by COMSOL simulations. Overall, the presented sensor demonstrates an improvement in the uniformity of the inductor’s magnetic... 

In this study، a novel frequency multiplier chain for wideband millimeter-wave applications at 28 GHz is presented. Millimeter-wave imaging systems require high frequency and wide bandwidth to accurately detect hidden objects. Various methods have been proposed to increase the frequency of generated signals, but in the meantime، frequency multiplier structures exhibit better performance in terms of bandwidth، power consumption and, harmonic rejection. These circuits are widely used in High-frequency telecommunication systems such as 5th generation mobile services. To design a frequency quadrupler، two multiplier stages based on the improved quadrature Gilbert structure were used. Generating... 

Nowadays, frequency synthesizers are widely used in many modern devices due to the ever-increasing growth of electronic circuits and their applications in various aspects of life. Imaging devices with security applications in the millimeter-wave frequency band is one of the mentioned applications. To prevent crowds at checkpoints and facilitate traffic, these devices need to monitor people's security at the highest possible speed. Furthermore, significant bandwidth is required to increase image quality. Therefore, using frequency generators with high-speed frequency sweep ability is a great advantage. In this thesis, a digital frequency generating chip with 1GHz bandwidth is designed using... 

This project is dedicated to design and implementation of a 77 GHz Power Amplifier for FMCW automotive radar application. Design of this type of Power amplifier faces several main challenges. The first challenge is due to the limits of technology used for implementing the power amplifier design (CMOS 65nm), for example the low breakdown voltage of transistors forces us to use low supply voltage. The other challenges are high frequency effects and complexity of design in mm-wave frequency. however, there are phenomena which dont have any important effect on output results in low frequency, but we should consider those when designing Power Amplifier in mm-wave frequencies.In order to... 

Wideband mm-wave radars are gaining popularity in automotive applications due to their superiority in harsh weather conditions, high distance resolution, precise velocity measurement, and superior spatial resolution. The primary purpose of this thesis is to design and implement a voltage-controlled oscillator for 77GHz automotive radar applications.Phase noise -as one of the most crucial specifications in VCO design- Phase noise improvement techniques as well as harmonic engineering methods are delineated. Also, an Ocean-based code for ISF simulation is introduced and developed to obviate the need for additional signal processing software so that simulation speed increases... 

In order to improve the performance of radar systems, encouraging the movement towards multifunctional applications, wider frequency span is required to be considered for phased array systems constituting radars. The conventional approach of phase shifting is not applicable to wideband phased array system, and the need for phased array systems based on time delay is apparent. In active phased array systems where a transceiver module is placed before each radiating element, the task of controlling the delay and gain variation of each path is assigned to individual core chips residing in the transceiver modules. A typical core chip consists of several amplifying blocks along, with delay and... 

According to increasingly utilization of different frequency spots, RF receivers are allways under the threats of compression and desensitization because of large out-of-band or in-band blockers. The IC technologies afford fast, low-resistance switches as scaling keeps going on. With this mind, the Linear Periodic Time Varying circuits, in which the switches play the most dominant role, will be a sensible candidate for the concerns of blocker detection and rejection. Furthermore, nowadays’ receivers should be reconfigureable so as to be tunable at different frequency bands and satisfy contrastive standards. In this regard, the LPTV filters provide vast range of tunablity not only with... 

In this project, an inverting Buck-Boost converter with two negative linear regulator is designed, implemented and measured in CMOS 0.18μm-HV BCD technology. Input voltage of Buck-Boost converter can vary from +15V to +28 and output voltage is digitally adjustable from -1V to -10V. Maximum output current of the converter is 300mA. A current mode controller and a lag compensator is used to control the converter. A high speed highside current sensor is designed and used in current mode controller. Sampled current of the current sensor is also used in a current limit circuitary to limit the maximum current of highside switch. Two negative linear regulators are placed at the output of the... 

In this thesis, a low-power low-phase-noise 28 GHz voltage-controlled oscillator for 5G applications is presented. At first, to select the best structure in terms of FoM, various types of inductors and transformers have been designed and EM simulated. The class-C structure which leads to the highest FoM is chosen eventually. In order to increase oscillation amplitude and reduce phase noise while preserving FoM, a high-frequency noise filter is presented. This filter which is based on a λ/8 microstrip transmission line has solved the conventional filter problems e.g. narrow bandwidth, coupling with oscillator inductor and practical implementation issues.The oscillator is designed, EM... 

In this thesis, two types of smart switch & driver chips are designed in 0.18 um HV BCD technology; low side driver and high side driver. These drivers are smart, because of having various types of protection and detection circuits, which protect switch, driver and connected load, versus errors that can be occurred by the user or other environmental effects. The protection circuits are battery over & under voltage shutdown, current limit, inductive load clamper and thermal shutdown. Load status is checked by status detection circuit and reported to user by one bit flag. Battery voltage can vary from 7 V to 40 V and output current is limited to 2 A. Designed high side and low side drivers are... 

In this study, a Local Interconnect Network (LIN) transceiver was designed and implemented. This chip contains transmitter, receiver, low power receiver, digital control unit, oscillator, voltage regulator, high voltage switch, temperature sensor and battery voltage detector. The main focus on this study was on designing transmitter,receiver, low power receiver and temperature sensor. Through designing of this chip, in addition to functional and physical layer specification that mentioned in ISO 17987, electromagnetic compatibility specifications have been considered significantly.The designed chip with slope control and wave shaping of BUS signal has excellent radiated emission performance.... 

The signal sources, based on CMOS technology at mm wave have two categories, the first class is a harmonic oscillator and the second class is fundamental oscillator followed by a frequency multiplier. A systematic approach to obtain the upper bound of efficiency using the activite device condition and, oscillation condition is implemented. Based on polyharmonic distortion at large signal operation, harmonic translation and efficiency are optimized. It is shown that there is an optimum phase for voltage of harmonics at the oscillator ports (the gate and the drain).Based on this analysis, a 300 GHz harmonic oscillator, simulated in TSMC 65nm CMOS is designed. The proposed oscillator has an... 

Electro Static discharge (ESD) in ICs can damage them. To prevent ICs from being damaged by ESD, protection circuits must be used. These protection circuits can be either designed on chip or on PCBs, to be more protective, both can be used. In this thesis, 8 kV ESD protection circuits according to human body model (HBM) in high voltage 0.18 um CMOS technology has been designed. In this thesis, in addition to study of electro static discharge phenomenon and its protection circuits, we have designed high voltage pads which are protected against 8 kV electro static discharge according to human body model. Finally these pads have been used in automotive ICs. In this thesis, firs we have... 

Removing SAW filter from the input of a receiver makes the receiver extremely vulnerable to all sorts of blockers and interferers. It is shown in this thesis that due to existing large out-of-band blockers the linearity of the saw-less receiver has to be considerably higher than that of the conventional receivers with input SAW filter. These ever-present and unwanted signals that show up in the absence of the input SAW filter are divided into two groups of far and near out-of-band blockers and interferers. It is shown that removing these groups of unwanted signals require two distinct approaches, one for near and the other for the far out-of-band blockers. An inclusive solution to protect...