Sharif Digital Repository

Solid State Drives (SSDs) have recently emerged as a high speed random access alternative to classical magnetic disks. To date, SSD designs have been largely based on multi-channel bus architecture that confronts serious scalability problems in high-end enterprise SSDs with dozens of flash memory chips and a gigabyte host interface. This forces the community to rapidly change the bus-based inter-flash standards to respond to ever increasing application demands. In this paper, we first give a deep look at how different flash parameters and SSD internal designs affect the actual performance and scalability of the conventional architecture. Our experiments show that SSD performance improvement... 

As a result of the emerging use of mesh-based multicomputers (and recently mesh-based multiprocessor systems-on-chip), issues related to processor management have attracted much attention. In a mesh-based multiprocessor, after repeated submesh allocations and de-allocations, the system network may be fragmented, i.e. there might be unallocated nodes in the network. As a result, in a system with contiguous processor allocation, no new tasks can start running due to the lack of enough free adjacent processors to form a suitable submesh. Although there might be enough free processors available, they remain idle until the allocator can find a set of adjacent free nodes forming a submesh to be... 

Grid-based networks (or grids for short), such as meshes and tori, have been the underlying topology for many multicomputers, and have been extensively studied in the past as a graph topology. In this paper, we investigate some topological properties of grids without boundary wrap-around (meshes) and with boundary wrap-around (tori). In particular, we study the problem of finding the number of nodes located at/within a given distance from a given node (surface area/volume) in the network and derive some expressions for computing such a number. Furthermore, we provide similar expressions that improve on previous results already reported in the literature for some special cases of grids,... 

In optoelectronic OTIS multicomputer networks (also known as Swapped networks), electrical and optical interconnects are used for local and global communication, respectively. An interesting instance of the OTIS multicomputers is the OTIS-mesh. Pancyclicity is of great importance in the implementation of a variety of parallel algorithms in multicomputers. This paper addresses the Pancyclicity problem of OTIS-mesh. More precisely, we prove that if the factor graph G of an OTIS network is a 2-D or 3-D mesh with at least one even radix, OTIS-G can embed any cycle of length l, l?{4,6,7,8,9,...,|G|2}  

This paper presents a comprehensive performance model for fully adaptive routing in wormhole-switched Cartesian product networks. Besides the generality of the model which makes it suitable to be used for any product graph, experimental (simulation) results show that the proposed model exhibits high accuracy even in heavy traffic and saturation region, where other models have severe problems to predict the performance of the network. Most popular interconnection network can be defined as a Cartesian product of two or more networks including the mesh, hypercube, and torus networks. Torus and mesh networks are the most popular topologies used in recent supercomputing parallel machines. They... 

Mesh-based interconnection networks are the most popular inter-processor communication infrastructures used in current parallel supercomputers. Although many analytical models of n-D torus interconnection networks have been reported in the literature over the last decade, few analytical models have been proposed for the 2-D mesh case (and not for the general n-D mesh network) using inaccurate approximations as they have not fully incorporated the asymmetry effects of the mesh topology, in order to reduce the model complexity. There has not been reported, to the best of our knowledge, a performance model that can deal with the n-D mesh network. To fill this gap, in this paper, we propose the... 

This paper introduces a new class of interconnection networks named star-pyramid. An n-level star-pyramid is formed by piling up star graphs of dimensions 1 to n in a hierarchy, connecting any node in each i-dimensional star, 1 < i ? n, to a node in the (i - 1)-dimensional star whose index is reached by removing the i symbol from the index of the former node in the i-dimensional star graph. Having extracted the properties of the new topology, featuring topological properties, a minimal routing algorithm, a simple but efficient broadcast algorithm, Hamiltonicity and pancyclicity, we then compare the network properties of the proposed topology and the well-known pyramid topology. We show that... 

In this paper, a new topology for multicomputer interconnection networks, based on triangular mesh, is proposed. The new network, referred to as the triangular pyramid (or tripy for short), has L levels of triangular mesh. We study some basic important properties of the proposed network as well as introduce a routing algorithm for the tripy network based on the routing of triangular meshes. We prove that this form of pyramidal network is Hamiltonian, Hamiltonian-connected, and pancyclic. We also prove that the proposed network is 6-colorable and conduct a brief comparison of the tripy and its traditional pyramid counterpart. Our results show that the proposed network has higher scalability,... 

The utilization of the limited resources of a multiprocessor or multicomputer system is a primary performance issue which is crucial for the design of many scheduling algorithms. While many of the existing parallel machines benefit from a regular product network topology, almost none of the previous resource placement techniques have come to recognize and exploit this inherent regularity. This paper introduces several novel algorithms for deriving resource placement schemes in product networks based on the assumption of perfect resource placement in their underling basic graphs. Our techniques use known schemes for the basic networks as their building blocks for deploying the resource... 

The current article studies optimal intercore interconnect network in a NoC structure for 2D and 3D mesh, torus and hypercube topologies. Optimal wire width/spacing is calculated by numerically maximizing bandwidth times the reciprocal delay, which depends on the technology node and hop length. Through 3D integration and increasing tiers, optimal interconnect width and spacing in torus and hypercube topologies will decrease. The core-to-core channel width in all topologies will be obtained by assigning 20% of the power consumption to the routers. By increasing number of cores, channel width will decrease due to reduced power consumption of each core. This is more in hypercube topology, due... 

Multilevel interconnect network of a macrocell for 7.5 nm technology node is designed with carbon based interconnects (CBI) and Cu. Results are compared. Constrains of using CBI is discussed. It is shown that by using CBI power dissipation associated with wires could decrease by 32%. To use GNRs for more than one metal pair, reverse wire pitch idea is proposed that prevents undesirable increase in the number of metal layers  

In this paper, jitter due to both capacitive and inductive coupling is studied. Maximum frequency of driving signal on a wire is limited by its input rise time, fall time, pulse width, and the coupling effect from its neighbors. The analytical expressions to estimate the deterministic jitter time due to these effects are presented. The estimation is based on the fastest and slowest approximation of the signal waveform components. Also, we have extracted the eye opening parameters of the eye diagram. The inductance effects significance is shown on eye opening and jitter time. The 45nm technology is used for estimating the horizontal and vertical eye opening and jitter time. The presented... 

The application of digital technologies in power systems has resulted in an evolutionary replacement of electromechanical devices with numerical ones featuring internal digital processors with communication capabilities. A substation automation system (SAS) deploys substation operation functions, including control, protection, monitoring, and measuring. Ethernet technology and local area networks (LANs) make it possible to design substation communication architectures with greater reliability, availability, speed, and cost savings than conventional hard-wired systems. This paper proposes a new method to describe topologies of the SAS as an interconnected network. The concept of data... 

In this paper, a method for fast processing of data stream tuples in parallel execution of continuous queries over a multiprocessing environment is proposed. A copy of the query plan is assigned to each of processing units in the multiprocessing environment. Dynamic and continuous routing of input data stream tuples among the graph constructed by these copies (called the QueryMega Graph) for each input tuple determines that, after getting processed by each processing unit (e.g., processor), to which next processor it should be forwarded. Selection of the proper next processor is performed such that the destination processor imposes the minimum tuple latency to the corresponding tuple, among... 

As a result of the emerging use of mesh-based multicomputers (and recently mesh-based multiprocessor systems-on-chip), issues related to processor management have attracted much attention. In a mesh-based multiprocessor, after repeated submesh allocations and de-allocations, the system network may be fragmented, i.e. there might be unallocated nodes in the network. As a result, in a system with contiguous processor allocation, no new tasks can start running due to the lack of enough free adjacent processors to form a suitable submesh. Although there might be enough free processors available, they remain idle until the allocator can find a set of adjacent free nodes forming a submesh to be... 

Grid-based networks (or grids for short), such as meshes and tori, have been the underlying topology for many multicomputers, and have been extensively studied in the past as a graph topology. In this paper, we investigate some topological properties of grids without boundary wrap-around (meshes) and with boundary wrap-around (tori). In particular, we study the problem of finding the number of nodes located at/within a given distance from a given node (surface area/volume) in the network and derive some expressions for computing such a number. Furthermore, we provide similar expressions that improve on previous results already reported in the literature for some special cases of grids,... 

In optoelectronic OTIS multicomputer networks (also known as Swapped networks), electrical and optical interconnects are used for local and global communication, respectively. An interesting instance of the OTIS multicomputers is the OTIS-mesh. Pancyclicity is of great importance in the implementation of a variety of parallel algorithms in multicomputers. This paper addresses the Pancyclicity problem of OTIS-mesh. More precisely, we prove that if the factor graph G of an OTIS network is a 2-D or 3-D mesh with at least one even radix, OTIS-G can embed any cycle of length l, l∈{4,6,7,8,9,...,|G|2}  

This paper presents a comprehensive performance model for fully adaptive routing in wormhole-switched Cartesian product networks. Besides the generality of the model which makes it suitable to be used for any product graph, experimental (simulation) results show that the proposed model exhibits high accuracy even in heavy traffic and saturation region, where other models have severe problems to predict the performance of the network. Most popular interconnection network can be defined as a Cartesian product of two or more networks including the mesh, hypercube, and torus networks. Torus and mesh networks are the most popular topologies used in recent supercomputing parallel machines. They... 

Multicomputers have experienced a rapid development during the last decade. Multicomputers rely on an interconnection network among processors to support the message-passing mechanism. Therefore, the reliability of the interconnection network is very important for the reliability of the whole system. In this paper a new fault-tolerant routing algorithm, which is based on dimension order routing, is proposed for k-ary 2-cubes. Packets are sent to their destination through XY routing algorithm and if this transmission is not possible, YX routing algorithm is applied. The XY routing algorithm nullifies offset in "X" direction before routing in "Y" direction, but the YX routing algorithm first... 

Mesh-based interconnection networks are the most popular inter-processor communication infrastructures used in current parallel supercomputers. Although many analytical models of n-D torus interconnection networks have been reported in the literature over the last decade, few analytical models have been proposed for the 2-D mesh case (and not for the general n-D mesh network) using inaccurate approximations as they have not fully incorporated the asymmetry effects of the mesh topology, in order to reduce the model complexity. There has not been reported, to the best of our knowledge, a performance model that can deal with the n-D mesh network. To fill this gap, in this paper, we propose the...