Sharif Digital Repository

Network-on-Chip (NoC) as a promising design approach for on-chip interconnect fabrics could overcome the energy as well as synchronization challenges of the conventional interconnects in the gigascale System-on-Chips (SoC); The advantages of communication performance of traditional wired NoC will no longer be continued by the future technology scaling. Packets that travel between distant nodes of a large scale wired on-chip network significantly suffer from energy dissipation and latency due to the routing overhead at each hop. According to the International Technology Roadmap for Semiconductors annual report, the RFCMOS characteristics will be steadily improved by technology scaling. As the... 

The continued migration to smaller nanometer geometries brought fundamental limits to traditional on-chip hard wires performance. According to the International Technology Roadmap for Semiconductor (ITRS), feature size shrinking leads an increase in the operating frequency of RFCMOS devices. Thus, new interconnect methodologies such as radio frequency (RF) wireless can be employed on future chips projected for intra-chip wireless data communications. The size of Si integrated antenna in these frequencies will be several millimetres and the antenna length will be decrease by frequency increasing. In this paper, we have proposed an optimum radiation pattern achieved by a phased array (PA)... 

The performance of gigascale integration chips improves by cryogenic technologies such as subambient cooling. In these conditions, interconnects may perform at temperatures as low as 50 K. However, the local temperature of interconnects could easily be as high as 600 K at high-temperature chips. In this brief, we investigated the impact of temperature on delay of local, intermediate, and global interconnects of International Technology Roadmap for Semiconductors Node 2024. This is done for different values of interconnect width and length, nanotube diameter, and percentage of metallic carbon nanotubes (CNTs) in a grown bundle. Results are compared with those of copper counterpart. We showed... 

Network-on-Chip (NoC) paradigm has emerged as a revolutionary methodology to integrate numerous IP blocks on a single chip. The achievable performance of adopting NoCs is constrained by the performance limitation mainly imposed by the metal wires that are the physical realization of communication channels. According to the International Technology Roadmap for Semiconductors (ITRS) report, new interconnect paradigms providing huge bandwidth is in need for future products. The current wired channels have limited bandwidth, and consequently, they limit the performance enhancements that NoC architectures can provide. Optical interconnects are capable of achieving better performance via... 

Iran's petroleum industry is facing challenges including maturity of hydrocarbon fields, growing population of the nation that demands additional revenues from petroleum exports, and international economic sanctions that have limited access to technology sources. Restrictions from international technology providers have led managers of the industry enterprises to try to develop their needed technologies inside the country. The Ministry of Petroleum has supervised this and as a result, a technology planning systems has been developed and implemented since 2009. In this paper, an overview of the Iranian petroleum industry is provided from a technology planning perspective. The focus has been... 

According to International Technology Roadmap for Semiconductors (ITRS), before the end of this decade, we will be entering the era of a billion transistors on a single chip. The major threat toward the achievement of billion transistor on a chip is poor scalability of current interconnect infrastructure. With the advent of "Network on Chip (NoC)" various characters and methodologies of traditional networks were hardly considered on-chip. Failure, Power and Area are the major concepts that should be considered when migrating from traditional interconnection networks to NoCs. In this paper we study the effects of faulty links and nodes on power and performance of mesh based NoC, Also several...