Sharif Digital Repository

This article describes the development of an 18 kV, 30 kW power supply for a pulsed current load with the maximum current of 20 A and a di/dt equal to 100 A/μs. The achieved output ripple is less than 0.01%. In such a high level of precision, the most important issues are considerable difference between the instantaneous and average output powers, as well as insufficient reaction speed of the converter to the fast load change. Very low level of the voltage feedback and its sensitivity to the noise. The first issue necessitates a notable overdesign of the converter switches if the output voltage precision is dedicated to the converter. The second issue raises the problems relevant to... 

Non-linear loads such as rectifiers are growing in industry. Three phase inverter with non-linear load can lead to highly distorted output voltage. This paper proposes a method for reducing voltage THD in three phase inverters with non-linear load. The proposed method considers the load current as a disturbance and provide a control strategy to reject it using the disturbance observer method. This method doesn't need any additional sensors or hardware and is implemented digitally in controller. Simulation results show that the presented method will reduce the total harmonic distortion of the output voltage. © 2017 IEEE  

This paper presents a powerful application of genetic algorithm (GA) for the minimization of the total harmonic current distortion (THCD) in high-power induction motors fed by voltage source inverters, based on an approximate harmonic model. That is, having defined a desired fundamental output voltage, optimal pulse patterns (switching angles) are determined to produce the fundamental output voltage while minimizing the THCD. The complete results for the two cases of three and five switching instants in the first quarter period of pulse width modulation (PWM) waveform are presented. Presence of harmonics in the stator excitation leads to a pulsing-torque component. Considering the fact that... 

Passivity-based control (PBC) is based on a procedure including energy/power shaping and series/parallel damping injection to control several nonlinear systems such as power converters. In this paper, PBC is used to design a controller for three phase/level/switch PWM (Vienna I) rectifier. Passivity-based controller is supposed to regulate the output voltage and the input three phase sinusoidal currents to achieve unity power factor. Parallel damping injection is used for a controller design. Simulation results are presented to confirm the whole system performance and verify the analytical conclusions. It is also shown that the controller is robust to the load and (symmetrical) input... 

This paper presents a new topology for DC/DC converter which satisfies the need for high gain, high efficiency, low weight and low cost for renewables application. This topology is a novel approach of Resonant PWM converters which produces high output voltage with soft switching method (ZVS). The converter can be controlled both by PWM and frequency variation method. The main characteristics of this structure are illustrated using simulation results and compared with other well-known structures. © 2018 IEEE  

In this paper, a new interleaved DC–DC converter based on a coupled and a single input inductor is proposed. The suggested high step-up converter utilizes various inductive and capacitive methods to transfer magnetic energy more efficiently. The output voltage is regulated with the switches' duty cycle and the coupled inductor (CI) turns ratio, which provide a wide output voltage range. Interleaving improves the converter reliability, employs both the first and third areas of CI's B-H plane, cancels DC component of the CI, and reduces the input current ripple of the proposed converter with twice switching frequency. Utilization of two output ports for voltage stress and ripple reduction in... 

This paper proposes an enhanced hybrid modular multilevel converter (MMC), which utilizes a combination of halfbridge submodules (HBSM) and at least one full-bridge submodule (FBSM). In the proposed structure, FBSMs work with half of the HBSMs nominal voltage in each arm. Due to the presence of FBSMs, HBSMs switching frequency drops significantly, which reduces the converter power loss compared to half-bridge based MMCs. Furthermore, because of redundant FBSMs, (2N+1)-modulation can be employed to generate the output voltage without increasing the circulating current, thus the converter performance is improved notably. Besides, with the redundant FBSMs the converter can continue its... 

This paper proposes an enhanced hybrid modular multilevel converter (MMC), which utilizes a combination of half-bridge submodules (HBSM) and at least one full-bridge submodule (FBSM). In the proposed structure, FBSMs work with half of the HBSMs nominal voltage in each arm. Due to the presence of FBSMs, HBSMs switching frequency drops significantly, which reduces the converter power loss compared to half-bridge based MMCs. Furthermore, because of redundant FBSMs, (2N + 1)-modulation can be employed to generate the output voltage without increasing the circulating current, thus, the converter performance is improved notably. Besides, with the redundant FBSMs, the converter can continue its... 

A space vector modulation (SVM) approach is proposed to control a four-switch rectifier with power factor correction and compensating the effect of capacitors voltage ripple. The theory and performance of this method are presented, and the method effectiveness is demonstrated by extensive simulations. The simulation results show that the capacitor voltage ripple effects in the output voltage and current shaping can be omitted and the rectifier can work agreeably under high power factor condition although capacitors voltage is not balance. The allowable amount of this unbalanced value of filter capacitors is determined  

This paper is focused on improving the post-fault performance of cascaded H-bridge multilevel inverters by decreasing the common-mode voltage. First, an algorithm is proposed to determine the optimal post-fault state among all possible states, which have the same maximum available voltage. Furthermore, a modified technique is proposed to calculate the references of inverter phase voltages under faulty conditions. This technique leads to a decrease in the common-mode voltage when the required output voltage is less than its maximum value. These solutions are mutually employed in the post-fault control system. Simulation and experimental results confirm the effectiveness of the proposed... 

A novel control method is proposed for single-stage three-phase isolated buck+boost rectifier. The control method is based on the conventional cascade two-loop control structure and is modified to achieve constant instantaneous input power. Input voltages, output voltage, and DC-link inductor current are measured to control the power switches to achieve output voltage regulation as well as input power factor correction. In the proposed method, input currents are controlled such that input power is constant even for unbalanced mains. Thus for balanced mains converter behaves like an ideal rectifier, and for unbalanced mains, low-frequency harmonics of the output voltage are suppressed. The... 

In this paper, a dual-frame hybrid vector control (DFHVC) of vector-modulated VIENNA I rectifier is proposed. The purpose of this novel vector control system is not only to reduce second-order harmonic pulsation on the dc-side and consequently, to reduce odd-order harmonics on the ac side of VIENNA I rectifier under unbalanced mains, but also to ensure a near unity power factor operation of the rectifier under such circumstances. To serve this purpose, at first, a mathematical model of the VIENNA I rectifier under unbalanced condition is derived. In this model, besides demonstrating the nonlinear nature of the DC-link voltage dynamic, a new set of equations for current reference generation... 

An ac neutral wire is connected to the midpoint of the dc bus of the three level/phase NPC rectifiers and then a new dual Lagrangian model of the rectifier is presented in this paper. At first, the load current can be obtained in two forms: 1. the load current involving the current of capacitor C1 2. The load current involving the current of capacitor C2 and then the new model is founded based on the superposition law, the load current and The Euler-Lagrange description of the rectifier. The new model is two nonlinear state space equations and as a result we define two positive definite Lyapunov function candidates based on two equations. Finally two Lyapunov-based controllers are designed... 

The load current of three level/phase neutral point clamped rectifier could be expressed in two forms: the load current involving the current of capacitor C1, and the load current involving the current of capacitor C2. Using the Euler-Lagrange model based on the superposition law and the obtained load current, a new dual Lagrangian model of the rectifier is founded in this paper and then the two obtained nonlinear state space models are developed in dq0 reference frame. According to the new model, two positive definite Lyapunov function candidates are defined and a Lyapunov-based control is applied to the rectifier. Each of the function is utilized to control its corresponding output voltage... 

This paper presents an input/output feedback linearization control strategy for the three-level three-phase neutral-point-clamped rectifier using it's dual Lagrangian modeling, which is obtained based on the superposition law, the load current and The Euler-Lagrange description of the rectifier. The load current can be given in two forms: 1. the load current involving the current of capacitor C1 and 2. The load current involving the current of capacitor C2 Applying the obtained load current to the Euler-Lagrange parameters of the rectifier, two nonlinear models of the system are derived. Also two the power-balance equations between the input and output sides are obtained by considering the... 

Controlling inverters with LC output filters in order to achieve a high quality desired output voltage or current is a challenging problem in power electronics. The LC filter and the binary nature of switch state variables increase the difficulty of achieving a single comprehensive model for the system. In this paper, a hybrid model is presented for a three-phase inverter with an LC output filter and a three-phase RL load. Then, the Model Predictive Control (MPC) algorithm is applied to the model and a geometrical approximate method is used to fit the answers to the binary values. Simulation results for a sample system verify the usability of the method and the quality of the answers  

A fully integrated, low-cost (area), low-power, high-gain, differential Optical Receiver Analog Front-End (AFE), including Transimpedance Amplifier (TIA), Limiting Amplifier (LA), DC-Offset Cancellation Feedback and Output-Buffer is designed in TSMC 0.18μm CMOS Technology. The optimized TIA has a Regulated Cascode (RGC) topology, with 5.9mW power-dissipation, 48 dBΩ gain, 8.46GHz bandwidth. The Proposed Limiting Amplifier (LA) has an Inductor-Less topology, with 41.9dB gain, 91.1mW power consumption (including Output Buffer), output swing of 0.4VP-P, and bandwidth of 7.88GHz (Output-Buffer applied), using Built-in Active Inductors and Negative Miller Capacitance to broaden the bandwidth. The... 

A low-power high-speed two-stage dynamic comparator is presented. The voltage fluctuation at the first stage of the comparator (pre-Amplifier stage) is limited to V dd=2. Therefore, the power consumption of the first stage which is the dominant part of the total power consumption is reduced. The output voltage of the first stage is kept above V dd=2. As a result, during the comparison the second stage of the comparator (latch) is activated stronger compared to the conventional comparator. To prove the benefits of the proposed comparator, the proposed and the other circuits are simulated in the equal budget of power and offset. Simulation results prove that the proposed comparator is faster... 

A low-power technique for high-resolution comparators is introduced. In this technique, p-type metal-oxide-semiconductor field-effect transistors are employed as the input of the latch of the comparator just like the input of the preamplifier. The latch and preamplifier stages are activated in a special pattern using an inverter-based controller. Unlike the conventional comparator, the preamplification delay can be set to an optimum low value even if after the preamplification, the output voltages is less than n-channel metal-oxide semiconductor voltage threshold. As a result, the proposed comparator reduces the power consumption significantly and enhances the speed. The speed and power... 

In this paper a novel T type scheme for 1-phase direct ac/ac converters is proposed. In this topology, frequency changing takes place directly (without common DC voltage bus) through three converters that are connected in a T structure. Unity power factor and precise output voltage regulation is achieved through appropriate control of these three converters. H-bridge converters are implemented, as the basic unit, in each branches of T to make the proposed converter. The converter is controlled such that the average active power of each H-bridges remains zero. So capacitors are implemented in DC links of H-bridges. In comparison to conventional back-to-back converters, life time of each...