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    Accelerating Numerical Solution of Steady and Unsteady Equations Using FPGA

    , Ph.D. Dissertation Sharif University of Technology Zandsalimy, Mohammad (Author) ; Ebrahimi, Abbas (Supervisor)
    Abstract
    Nowadays one of the main challenges facing fluid dynamics simulations is the long duration of numerical calculations. The goal of this research is to use FPGAs (Field Programmable Gate Arrays) to accelerate fluid dynamics solutions. First, the ability of FPGAs in mathematical operations on floating point numbers is studied. Then, various fluid dynamics problems are implemented on the FPGA hardware, and each one is solved separately. Unsteady 1D Couette problem, 2D potential flow (Laplace equation), incompressible viscous fluid flow over a backward facing step, and compressible inviscid flow over a bump are some of the problems in question. FPGA is an integrated circuit containing a number of... 

    Design of Reconfigurable Hardware Security Module Based on Network Protocol Detection

    , M.Sc. Thesis Sharif University of Technology Zohouri, Hamid Reza (Author) ; Jahangir, Amir Hossein (Supervisor)
    Abstract
    Nowadays, in the presence of different types of computer attacks and different methods of eavesdropping on network communications, nobody can deny the importance of cryptography. Hardware Security Modules that are specifically designed for this purpose are widely used as a fast and reliable tool for encrypting data in computer networks. In this project, using the common and well-known FPGA platform and by leveraging the reconfigurability feature of this platform and also by adding a network protocol detection module to the traditional architecture of Hardware Security Modules, a novel module has been designed and implemented that can encrypt and decrypt data in a communication network, at... 

    Reducing the Energy Consumption of the Embedded Real-Time Systems with Reconfigurable Components

    , M.Sc. Thesis Sharif University of Technology Dastangoo, Ali (Author) ; Ejlali, Alireza (Supervisor)
    Abstract
    Over the Recent Decade, the embedded systems have expanded to include a wide variety of products, ranging from digital cameras, to medical systems, to Radar and telecommunication systems, to sensor networks. Engineers strive to create ever smaller and faster products, many of which, such as battery operated systems, have stringent power requirements. Coupled with increasing pressure to decrease costs and time-to-market, the design constraints of embedded systems pose a serious challenge to embedded systems designers. Dynamic reconfigurable hardware can provide a flexible and efficient platform for satisfying the area, performance, cost, and power requirements of many embedded systems.... 

    A fault tolerant parallelism approach for implementing High-throughput pipelined advanced encryption standard

    , Article Journal of Circuits, Systems and Computers ; Volume 25, Issue 9 , 2016 ; 02181266 (ISSN) Mardani Kamali, H ; Hessabi, S ; Sharif University of Technology
    World Scientific Publishing Co. Pte Ltd  2016
    Abstract
    Advanced Encryption Standard (AES) is the most popular symmetric encryption method, which encrypts streams of data by using symmetric keys. The current preferable AES architectures employ effective methods to achieve two important goals: protection against power analysis attacks and high-throughput. Based on a different architectural point of view, we implement a particular parallel architecture for the latter goal, which is capable of implementing a more efficient pipelining in field-programmable gate array (FPGA). In this regard, all intermediate registers which have a role for unrolling the main loop will be removed. Also, instead of unrolling the main loop of AES algorithm, we implement... 

    Smart mesoporous silica nanoparticles for controlled-release drug delivery

    , Article Nanotechnology Reviews ; Volume 5, Issue 2 , 2016 , Pages 195-207 ; 21919089 (ISSN) Karimi, M ; Mirshekari, H ; Aliakbari, M ; Sahandi Zangabad, P ; Hamblin, M. R ; Sharif University of Technology
    Walter de Gruyter GmbH  2016
    Abstract
    Stimuli-responsive controlled-release nanocarriers are promising vehicles for delivery of bioactive molecules that can minimize side effects and maximize efficiency. The release of the drug occurs when the nanocarrier is triggered by an internal or external stimulus. Mesoporous silica nanoparticles (MSN) can have drugs and bioactive cargos loaded into the high-capacity pores, and their release can be triggered by activation of a variety of stimulus-responsive molecular "gatekeepers" or "nanovalves." In this mini-review, we discuss the basic concepts of MSN in targeted drug-release systems and cover different stimulus-responsive gatekeepers. Internal stimuli include redox, enzymes, and pH,... 

    An isolated bidirectional integrated plug-in hybrid electric vehicle battery charger with resonant converters

    , Article Electric Power Components and Systems ; Volume 44, Issue 12 , 2016 , Pages 1371-1383 ; 15325008 (ISSN) Ebrahimi, S ; Akbari, R ; Tahami, F ; Oraee, H ; Sharif University of Technology
    Taylor and Francis Inc  2016
    Abstract
    Plug-in hybrid electric vehicles draw electricity from the electrical grid and store energy in their batteries. To increase charge availability for plug-in hybrid electric vehicles, on-board chargers can be used, which should be small in size and lightweight. In this article, an on-board bidirectional soft-switched battery charger is proposed that utilizes a phase-shift-controlled dual-bridge series resonant converter with isolation. The bidirectional characteristic of proposed charger makes it suitable for vehicle-to-grid operation (i.e., injecting power from the vehicle to the grid) in smart grids. A switching control scheme is also proposed to provide soft-switching operation for all... 

    Coupled electromechanical analysis of MEMS-based energy harvesters integrated with nonlinear power extraction circuits

    , Article Microsystem Technologies ; 2016 , Pages 1-18 ; 09467076 (ISSN) Pasharavesh, A ; Ahmadian, M. T ; Zohoor, H ; Sharif University of Technology
    Springer Verlag  2016
    Abstract
    Application of piezoelectric materials in vibration energy harvesters is expanding rapidly, especially in MEMS-based devices, due to their uncomplicated fabrication processes and reasonable power generation potential. In addition to standard power extraction methods, nonlinear switched techniques with capability of generated power enhancement, are previously developed and extensively applied in energy harvesting using piezoelectric materials. In this article, vibratory behavior of bimorph resonant harvesters coupled to nonlinear circuits of energy harvesting including standard and switched techniques is investigated. An analytical approach employing some perturbation technique, is utilized... 

    Coupled electromechanical analysis of MEMS-based energy harvesters integrated with nonlinear power extraction circuits

    , Article Microsystem Technologies ; Volume 23, Issue 7 , 2017 , Pages 2403-2420 ; 09467076 (ISSN) Pasharavesh, A ; Ahmadian, M. T ; Zohoor, H ; Sharif University of Technology
    Springer Verlag  2017
    Abstract
    Application of piezoelectric materials in vibration energy harvesters is expanding rapidly, especially in MEMS-based devices, due to their uncomplicated fabrication processes and reasonable power generation potential. In addition to standard power extraction methods, nonlinear switched techniques with capability of generated power enhancement, are previously developed and extensively applied in energy harvesting using piezoelectric materials. In this article, vibratory behavior of bimorph resonant harvesters coupled to nonlinear circuits of energy harvesting including standard and switched techniques is investigated. An analytical approach employing some perturbation technique, is utilized... 

    A 3D analytical modeling of tri-gate tunneling field-effect transistors

    , Article Journal of Computational Electronics ; Volume 15, Issue 3 , 2016 , Pages 820-830 ; 15698025 (ISSN) Marjani, S ; Hosseini, S. E ; Faez, R ; Sharif University of Technology
    Springer New York LLC  2016
    Abstract
    In this paper, a three-dimensional (3D) analytical solution of the electrostatic potential is derived for the tri-gate tunneling field-effect transistors (TG TFETs) based on the perimeter-weighted-sum approach. The model is derived by separating the device into a symmetric and an asymmetric double-gate (DG) TFETs and then solving the 2D Poisson’s equation for these structures. The subthreshold tunneling current expression is extracted by numerical integrating the band-to-band tunneling generation rate over the volume of the device. It is shown that the potential distributions, the electric field profile, and the tunneling current predicted by the analytical model are in close agreement with... 

    A unified approach to detect and distinguish hardware trojans and faults in sram-based fpgas

    , Article Journal of Electronic Testing: Theory and Applications (JETTA) ; Volume 35, Issue 2 , 2019 , Pages 201-214 ; 09238174 (ISSN) Ranjbar, O ; Bayat Sarmadi, S ; Pooyan, F ; Asadi, H ; Sharif University of Technology
    Springer New York LLC  2019
    Abstract
    In recent years, confrontation with hardware Trojans has become a major concern due to various reasons including outsourcing. Such a growing threat is more pronounced in reconfigurable devices as they are used in widespread applications due to low design cost and short time-to-market. Besides their vulnerability to hardware Trojan attacks, SRAM-based reconfigurable devices are also significantly susceptible to faults originated by particle strikes. There have been various methods to mitigate either hardware Trojan attacks or faults. To our knowledge, however, no method has been presented that can integrate detecting, distinguishing, and mitigating faults and Trojans. In this paper, we... 

    A numerical study on the influence of interface recombination on performance of carbon nanotube/GaAs solar cells

    , Article Optical and Quantum Electronics ; Volume 48, Issue 8 , 2016 ; 03068919 (ISSN) Movla, H ; Ghaffari, S ; Rezaei, E ; Sharif University of Technology
    Springer New York LLC 
    Abstract
    Carbon nanotubes (CNT) have unique electronic properties and remarkable optical properties. Despite of on layer thickness of CNTs, it has able to absorb photons from visible to far infrared and terahertz. These unique properties lets to create heterojunction devices by semiconductor/CNTs or metal/CNTs junctions e.g. photodiodes, sensor and heterojunction solar cell. The CNTs can play the role of a heterojunction component for charge separation as a high conductive network for charge transport and as a transparent electrode for light illumination and charge collection. The main objective of the present article is to establish a relation between interface recombination and the characteristics... 

    On the energy harvesting via doubly curved piezoelectric panels

    , Article Journal of Intelligent Material Systems and Structures ; Volume 27, Issue 19 , 2016 , Pages 2692-2706 ; 1045389X (ISSN) Sayyaadi, H ; Rahnama, F ; Sharif University of Technology
    SAGE Publications Ltd 
    Abstract
    This article presents an analytical solution for power output from a doubly curved piezoelectric energy harvester. The energy harvester is made of an elastic core layer coupled with one or two surface-bonded piezoelectric layers. Five mechanical equations of motion together with Gauss's equation are derived on the basis of first-order shell theory and solved simultaneously for simply supported mechanical boundary conditions. The influence of structural damping is taken into account using Rayleigh damping. The electromechanical frequency response functions that relate the power output and circuit load resistance are identified from the exact solutions. Finally, the performance of the system... 

    Fast fault detection method for modular multilevel converter semiconductor power switches

    , Article IET Power Electronics ; Volume 9, Issue 2 , 2016 , Pages 165-174 ; 17554535 (ISSN) Haghnazari, S ; Khodabandeh, M ; Zolghadri, M. R ; Sharif University of Technology
    Institution of Engineering and Technology  2016
    Abstract
    This study proposes a new fault detection method for modular multilevel converter (MMC) semiconductor power switches. While in common MMCs, the cells capacitor voltages are measured directly for control purposes, in this study voltage measurement point changes to the cell output terminal improving fault diagnosis ability. Based on this measurement reconfiguration, a novel fault detection algorithm is designed for MMCs semiconductor power switches. The open circuit and short circuit faults are detected based on unconformity between modules output voltage and switching signals. Simulation and experimental results confirm accurate and fast operation of the proposed method in faulty cell... 

    A partial task replication algorithm for fault-tolerant FPGA-based soft-multiprocessors

    , Article CSI Symposium on Real-Time and Embedded Systems and Technologies, RTEST 2015, 7 October 2015 through 8 October 2015 ; October , 2015 , Page(s): 1 - 7 ; 9781467380478 (ISBN) Zabihi, M ; Farbeh, H ; Miremadi, S. G ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    FPGA-based multiprocessors, referred as softmultiprocessors, have an increasing use in embedded systems due to appealing SRAM features. More than 95% of such FPGAs are occupied by SRAM cells constructing the configuration bits. These SRAM cells are highly vulnerable to soft errors threatening the reliability of the system. This paper proposes a fault-tolerant method to detect and correct errors in the configuration bits. The main of this method is to analyze the scheduled task graph and select a subset of tasks to be replicated in multiple processors based on the utilization of the processors in different execution phases. To this end, 1) errors are detected by re-executing a subset of tasks... 

    Collision-free path planning of a novel reconfigurable mobile parallel mechanism

    , Article International Conference on Robotics and Mechatronics, ICROM 2015, 7 October 2015 through 9 October 2015 ; 2015 , Pages 389-394 ; 9781467372343 (ISBN) Nozari Porshokouhi, P ; Kazemi, H ; Masouleh, M. T ; Novin, R. S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    This paper initially deals with the design of a new customized reconfigurable mobile parallel mechanism. This mechanism is called "Taar Reconfigurable ParaMobile (TRPM)", consisting of three mobile robots as the main actuators. Then, the kinematics and path planning for this mechanism are represented. The newly proposed mechanism is expected to circumvent some shortcomings of inspection operation in unknown environments with unexpected changes in their workspace, e.g., in a water pipe with non-uniform section area. In this paper, "Artificial Potential Field (APF)" has been assumed to be the path planning algorithm and its resulting attractive and repulsive forces are only applied to the... 

    DsReliM: Power-constrained reliability management in Dark-Silicon many-core chips under process variations

    , Article International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2015, 4 October 2015 through 9 October 2015 ; Oct , 2015 , Pages 75-82 ; 9781467383219 (ISBN) Salehi, M ; Shafique, M ; Kriebel, F ; Rehman, S ; Tavana, M. K ; Ejlali, A ; Henkel, J ; ACM; IEEE ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    Due to the tight power envelope, in the future technology nodes it is envisaged that not all cores in a many-core chip can be simultaneously powered-on (at full performance level). The power-gated cores are referred to as Dark Silicon. At the same time, growing reliability issues due to process variations and soft errors challenge the cost-effective deployment of future technology nodes. This paper presents a reliability management system for Dark Silicon chips (dsReliM) that optimizes for reliability of on-chip systems while jointly accounting for soft errors, process variations and the thermal design power (TDP) constraint. Towards the TDP-constrained reliability optimization, dsReliM... 

    Designing the FPGA-based system for Triangle Phase space Mapping (TPSM) of heart rate variability (HRV) signal

    , Article 2015 38th International Conference on Telecommunications and Signal Processing, TSP 2015, 9 July 2015 through 11 July 2015 ; July , 2015 , Page(s): 1 - 4 ; 9781479984985 (ISBN) Rezaei, S ; Moharreri, S ; Ghorshi, A ; Molnar K ; Herencsar N ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    There has been an increasing interest in telemonitoring thanks to the availability of new technologies for data transmission and processing with better performances and lower costs. In this paper, we try to develop and implement the HRV signal processing into a Field Programmable Gate Array (FPGA). The hardware implementing algorithm was developed in Verilog Hardware Description Language (HDL). In designed hardware, after defining the number of samples in the input, we extract and analyses the Triangular Phase Space Mapping (TPSM), a novel method for representation of heart rate. The performance of the system was tested using MATLAB and validated based on the input signals  

    An efficient reconfigurable architecture by characterizing most frequent logic functions

    , Article 25th International Conference on Field Programmable Logic and Applications, FPL 2015, 2 September 2015 through 4 September 2015 ; Sept , 2015 , Page(s): 1 - 6 ; 9780993428005 (ISBN) Ahmadpour, I ; Khaleghi, B ; Asadi, H ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    Generous flexibility of Look-Up Tables (LUTs) in implementing arbitrary functions comes with significant performance and area overheads compared with their Application-Specific Integrated Circuit (ASIC) equivalent. One approach to alleviate such overheads is to use less flexible logic elements capable to implement majority of logic functions. In this paper, we first investigate the most frequently used functions in standard benchmarks and then design a set of less-flexible but area-efficient logic cells, called Hard Logics (HL). Since higher input functions have diverse classes, we leverage Shannon decomposition to break them into smaller ones to either reduce the HL design space complexity... 

    An efficient DVS scheme for on-chip networks using reconfigurable Virtual Channel allocators

    , Article Proceedings of the International Symposium on Low Power Electronics and Design, 22 July 2015 through 24 July 2015 ; Volume 2015-September , July , 2015 , Pages 249-254 ; 15334678 (ISSN) ; 9781467380096 (ISBN) Sadrosadati, M ; Mirhosseini, A ; Aghilinasab, H ; Sarbazi Azad, H ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    Network-on-Chip (NoC) is a key element in the total power consumption of a chip multiprocessor. Dynamic Voltage Scaling is a promising method for power saving in NoCs since it contributes to reduction in both static and dynamic power consumptions. In this paper, we propose a novel scheme to reduce on-chip network power consumption when the number of Virtual Channels (VCs) with active allocation requests per cycle is less than the number of total VCs. In our method, we introduce a reconfigurable arbitration logic which can be configured to have multiple latencies and hence, multiple slack times. The increased slack times are then used to reduce the supply voltage of the routers in order to... 

    DRVS: Power-efficient reliability management through Dynamic Redundancy and Voltage Scaling under variations

    , Article 20th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015, 22 July 2015 through 24 July 2015 ; Volume 2015 , September , 2015 , Pages 225-230 ; 15334678 (ISSN) ; 9781467380096 (ISBN) Salehi, M ; Tavana, M. K ; Rehman, S ; Kriebel, F ; Shafique, M ; Ejlali, A ; Henkel, J ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    Many-core processors facilitate coarse-grained reliability by exploiting available cores for redundant multithreading. However, ensuring high reliability with reduced power consumption necessitates joint considerations of variations in vulnerability, performance and power properties of software as well as the underlying hardware. In this paper, we propose a power-efficient reliability management system for many-core processors. It exploits various basic redundancy techniques (like, dual and triple modular redundancy) operating in different voltage-frequency levels, each offering distinct reliability, performance and power properties. Our system performs Dynamic Redundancy and Voltage Scaling...